Re: [PATCH v2 1/3] media: mt9m111: add V4L2_CID_LINK_FREQ support
From: Marco Felsch
Date: Tue Sep 20 2022 - 04:56:32 EST
Hi Sakari,
On 22-09-19, Sakari Ailus wrote:
...
> > > > + ret = clk_prepare_enable(mt9m111->clk);
> > > > + if (ret < 0)
> > > > + return ret;
> > > > +
> > > > + extclk_rate = clk_get_rate(mt9m111->clk);
> > > > + clk_disable_unprepare(mt9m111->clk);
> > >
> > > I don't think you'll need to enable a clock to just get its frequency.
> >
> > The official API states that you need to turn on the clk before
> > requesting it and it makes sense. Also there is a new helper
> > devm_clk_get_enabled() which addresses simple clk usage since most of
> > drivers don't enable it before requesting the rate.
>
> I guess the rate could change in the meantime, unless exclusive access is
> requested.
Not only that, there are a bunch of clk provider hw around which may
need to turned on first. Anyway, I really don't care on this topic. As
I said I wanted to fullfil the API and if drop clk_prepare_enable() I
don't. So if this okay for you I will go that way.
> The clock framework currently doesn't offer a way to set the assigned
> rate and prevent changing it. But above, couldn't the clock frequency
> be changed again once the clock has been disabled?
Yes it could.
Regards,
Marco