Re: [PATCH 17/19] arm64: dts: qcom: qdru1000: Add I2C nodes for QUP
From: Dmitry Baryshkov
Date: Sat Oct 01 2022 - 03:31:09 EST
On Sat, 1 Oct 2022 at 06:09, Melody Olvera <quic_molvera@xxxxxxxxxxx> wrote:
>
> Add I2C nodes to the QUP along with pinconf for these nodes.
>
> Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/qdru1000.dtsi | 365 +++++++++++++++++++++++++
> 1 file changed, 365 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdru1000.dtsi b/arch/arm64/boot/dts/qcom/qdru1000.dtsi
> index c105bc15995b..40d7cc4c1f3d 100644
> --- a/arch/arm64/boot/dts/qcom/qdru1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdru1000.dtsi
> @@ -302,6 +302,132 @@ uart7: serial@99c000 {
> #size-cells = <0>;
> status = "disabled";
> };
> +
> + i2c1: i2c@984000 {
Sort according to the address.
> + compatible = "qcom,geni-i2c";
> + reg = <0x0 0x984000 0x0 0x4000>;
> + clock-names = "se";
> + clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
> + interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> + interconnect-names = "qup-core", "qup-config", "qup-memory";
> + interconnects =
> + <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_QUP_0 0>,
> + <&system_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&qup_i2c1_data_clk>;
> + dmas = <&gpi_dma0 0 1 3 64 0>,
> + <&gpi_dma0 1 1 3 64 0>;
> + dma-names = "tx", "rx";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> @@ -381,6 +654,98 @@ rx {
> bias-disable;
> };
> };
> +
> + qup_i2c1_data_clk: qup-i2c1-data-clk {
> + pins = "gpio10", "gpio11";
> + function = "qup0_se1_l0";
> + drive-strength = <2>;
> + bias-pull-up;
No 'drive-strength' and 'bias-pull-up' here please.
> + };
> +
> + qup_i2c2_data_clk: qup-i2c2-data-clk {
> + pins = "gpio12", "gpio13";
> + function = "qup0_se2_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c3_data_clk: qup-i2c3-data-clk {
> + pins = "gpio14", "gpio15";
> + function = "qup0_se3_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c4_data_clk: qup-i2c4-data-clk {
> + pins = "gpio16", "gpio17";
> + function = "qup0_se4_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c5_data_clk: qup-i2c5-data-clk {
> + pins = "gpio130", "gpio131";
> + function = "qup0_se5_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c6_data_clk: qup-i2c6-data-clk {
> + pins = "gpio132", "gpio133";
> + function = "qup0_se6_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c9_data_clk: qup-i2c9-data-clk {
> + pins = "gpio22", "gpio23";
> + function = "qup1_se1_l0";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + qup_i2c10_data_clk: qup-i2c10-data-clk {
> + pins = "gpio24", "gpio25";
> + function = "qup1_se2_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> + qup_i2c11_data_clk: qup-i2c11-data-clk {
> + pins = "gpio26", "gpio27";
> + function = "qup1_se3_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> + qup_i2c12_data_clk: qup-i2c12-data-clk {
> + pins = "gpio28", "gpio29";
> + function = "qup1_se4_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> + qup_i2c13_data_clk: qup-i2c13-data-clk {
> + pins = "gpio30", "gpio31";
> + function = "qup1_se5_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> + qup_i2c14_data_clk: qup-i2c14-data-clk {
> + pins = "gpio34", "gpio35";
> + function = "qup1_se6_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> + qup_i2c15_data_clk: qup-i2c15-data-clk {
> + pins = "gpio40", "gpio41";
> + function = "qup1_se7_l0";
> + drive-strength = <2>;
> + bias-pulll-up;
> + };
> +
> };
>
> pdc: interrupt-controller@b220000 {
> --
> 2.37.3
>
--
With best wishes
Dmitry