Re: [PATCH v5 0/3] arm64: dts: qcom: add dts for sa8540p-ride board

From: Andrew Halaney
Date: Mon Oct 03 2022 - 15:33:54 EST


On Mon, Oct 03, 2022 at 01:31:52PM -0400, Brian Masney wrote:
> On Mon, Oct 03, 2022 at 06:24:40PM +0530, Parikshit Pareek wrote:
> > Parikshit Pareek (3):
> > dt-bindings: arm: qcom: Document additional sa8540p device
> > arm64: dts: qcom: sa8295p: move common nodes to dtsi
> > arm64: dts: qcom: introduce sa8540p-ride dts
>
> For the series:
>
> Reviewed-by: Brian Masney <bmasney@xxxxxxxxxx>
> Tested-by: Brian Masney <bmasney@xxxxxxxxxx>

Tested-by: Andrew Halaney <ahalaney@xxxxxxxxxx> # QDrive3/sa8540p-adp-ride
>
>
> Just for documentation purposes, to get linux-next-20220930 booting on
> the QDrive3 with the upstream arm64 defconfig I had to apply the
> following patches:
>
> - arm64: dts: qcom: sc8280xp: fix UFS PHY serdes size
> https://lore.kernel.org/linux-arm-msm/20220915141601.18435-1-johan+linaro@xxxxxxxxxx/
>
> Without this, the phy fails to probe due to the following error:
>
> qcom-qmp-ufs-phy 1d87000.phy: can't request region for resource [mem 0x01d87400-0x01d87507]
> qcom-qmp-ufs-phy 1d87000.phy: failed to create lane0 phy, -16
> qcom-qmp-ufs-phy: probe of 1d87000.phy failed with error -16
>
> - This hack patch is still needed:
> disable has_address_auth_metacap and has_generic_auth
> https://github.com/andersson/kernel/commit/d46a4d05d5a17ff4447af08471edd78e194d48e5
>
> Without this, the boot hangs at:
>
> rcu: srcu_init: Setting srcu_struct sizes based on contention.
> arch_timer: cp15 and mmio timer(s) running at 19.20MHz (virt/virt).
> clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x46d987e47, max_idle_ns: 440795202767 ns
> sched_clock: 56 bits at 19MHz, resolution 52ns, wraps every 4398046511078ns
>
> - My UFS clock patch is still needed:
> arm64: dts: qcom: sc8280xp: correct ref_aux clock for ufs_mem_phy
> https://lore.kernel.org/lkml/20220830180120.2082734-1-bmasney@xxxxxxxxxx/T/#u
>
> - I didn't use an initrd for testing so I had to change the options
> CONFIG_SCSI_UFS_QCOM and CONFIG_PHY_QCOM_QMP from =m to =y.
>
> Brian
>