[PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
From: Frank Li
Date: Tue Oct 04 2022 - 16:24:47 EST
Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
drivers/irqchip/irq-imx-mu-msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139dc36e82..229039eda1b1f 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
.xSR = {
[IMX_MU_SR] = 0xC,
[IMX_MU_GSR] = 0x118,
- [IMX_MU_GSR] = 0x124,
+ [IMX_MU_TSR] = 0x124,
[IMX_MU_RSR] = 0x12C,
},
.xCR = {
--
2.35.1