Re: [PATCH 2/3] arm64: dts: rockchip: Rename pinctrl label of pcie2x1 on rock-3a

[Heiko Stübner]

Am Montag, 26. September 2022, 20:01:01 CEST schrieb Chukun Pan:
> Distinguish it from the pinctrl label of pcie3x2 added later.
> Also added comments to the pcie2x1 node.
> 
> Signed-off-by: Chukun Pan <amadeus@xxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> index 8adf672709e8..1b195355da2a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> @@ -539,8 +539,9 @@ rgmii_phy1: ethernet-phy@0 {
>  };
>  
>  &pcie2x1 {
> +	/* M.2 slot */
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&pcie_reset_h>;
> +	pinctrl-0 = <&ngffpcie_reset_h>;

please always try to use pin-names as they are in device-schematics.
I.e. if the reset-pin is named pcie_reset_h there, it should stay that way.
Following schematics names makes looking up things way easier.

Heiko

>  	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
>  	vpcie3v3-supply = <&vcc3v3_pcie>;
>  	status = "okay";
> @@ -582,7 +583,7 @@ pcie_enable_h: pcie-enable-h {
>  			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
>  		};
>  
> -		pcie_reset_h: pcie-reset-h {
> +		ngffpcie_reset_h: ngffpcie-reset-h {
>  			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
>  		};
>  	};
>