[PATCH 3/4] xhci-pci: Remove a number of controllers from the runtime PM allowlist

[Mario Limonciello]

When creating a device link from the XHCI PCI device to the USB4 router
the thunderbolt driver will opt the XHCI PCI device into runtime PM.

As such it's not necessary to include a hardcoded list of these XHCI
controllers.  This is effectively a full or partial revert of the following
commits:

* commit 8ffdc53a60049 ("xhci-pci: Allow host runtime PM as default for
Intel Meteor Lake xHCI")
* commit 7516da47a349e ("xhci-pci: Allow host runtime PM as default for
Intel Raptor Lake xHCI")
* commit 74f55a62c4c35 ("xhci: Allow host runtime PM as default for
Intel Alder Lake N xHCI")
* commit b813511135e8b ("xhci-pci: Allow host runtime PM as default for
Intel Alder Lake xHCI")
* commit f886d4fbb7c97 ("usb: xhci: Extend support for runtime power
management for AMD's Yellow carp.")

Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>
---
RFC v1->PATCH v1:
 * Drop ICL and TGL, these need it even for FW CM and don't have
   device links
 * Rebase on top of patch to make a table instead
---
 drivers/usb/host/xhci-pci.c | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 6e5bcec9b2b16..c17f748b05929 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -58,11 +58,7 @@
 #define PCI_DEVICE_ID_INTEL_CML_XHCI			0xa3af
 #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI		0x9a13
 #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI		0x1138
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI		0x461e
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI		0x464e
 #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI	0x51ed
-#define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI		0xa71e
-#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI		0x7ec0
 
 #define PCI_DEVICE_ID_AMD_RENOIR_XHCI			0x1639
 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4			0x43b9
@@ -73,10 +69,8 @@
 #define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2		0x161b
 #define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3		0x161d
 #define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4		0x161e
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5		0x15d6
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6		0x15d7
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7		0x161c
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8		0x161f
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5		0x161c
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6		0x161f
 
 #define PCI_DEVICE_ID_ASMEDIA_1042_XHCI			0x1042
 #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI		0x1142
@@ -98,11 +92,7 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_1) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3) },
@@ -110,8 +100,6 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8) },
 	{ 0 }
 };
 
-- 
2.34.1