[PATCH v1 2/5] dt-bindings: soc: hpe: Add hpe,gxp-plreg
From: nick . hawkins
Date: Tue Oct 11 2022 - 14:56:33 EST
From: Nick Hawkins <nick.hawkins@xxxxxxx>
The hpe,gxp-plreg binding provides access to the board i/o through the
Programmable logic interface. The binding provides information to enable
use of the same driver across the HPE portfolio.
Signed-off-by: Nick Hawkins <nick.hawkins@xxxxxxx>
---
.../bindings/soc/hpe/hpe,gxp-plreg.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/hpe/hpe,gxp-plreg.yaml
diff --git a/Documentation/devicetree/bindings/soc/hpe/hpe,gxp-plreg.yaml b/Documentation/devicetree/bindings/soc/hpe/hpe,gxp-plreg.yaml
new file mode 100644
index 000000000000..cdc54e66d9a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/hpe/hpe,gxp-plreg.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/hpe/hpe,gxp-plreg.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: HPE GXP Programmable Logic Registers Controller
+
+maintainers:
+ - Nick Hawkins <nick.hawkins@xxxxxxx>
+
+properties:
+ compatible:
+ items:
+ - const: hpe,gxp-plreg
+ - const: simple-mfd
+ - const: syscon
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+
+additionalProperties: true
+
+examples:
+ - |
+ cpld@1e789000 {
+ compatible = "hpe,gxp-plreg", "simple-mfd", "syscon";
+ reg = <0x1e789000 0x1000>;
+ fan1 {
+ bit = <0x01>;
+ inst = <0x27>;
+ id = <0x2B>;
+ };
+ iopled1 {
+ on = <0x04 0x01>;
+ };
+ pwrbtn {
+ latch = <0xFF 0xFF 0x04>;
+ };
+ };
+
--
2.17.1