Re: [PATCH v1 15/30] clk: starfive: Use regmap APIs to operate registers

From: Stephen Boyd
Date: Wed Oct 12 2022 - 19:05:34 EST


Quoting Emil Renner Berthing (2022-10-05 06:14:44)
> > > @@ -295,11 +296,13 @@ static int __init clk_starfive_jh7100_probe(struct platform_device *pdev)
> > > if (!priv)
> > > return -ENOMEM;
> > >
> > > - spin_lock_init(&priv->rmw_lock);
> > > priv->dev = &pdev->dev;
> > > - priv->base = devm_platform_ioremap_resource(pdev, 0);
> > > - if (IS_ERR(priv->base))
> > > - return PTR_ERR(priv->base);
> > > + priv->regmap = device_node_to_regmap(priv->dev->of_node);
> >
> > This is sad. Why do we need to make a syscon? Can we instead use the
> > auxiliary bus to make a reset device that either gets a regmap made here
> > in this driver or uses a void __iomem * mapped with ioremap
> > (priv->base)?
>
> In my original code the clock driver just registers the resets too
> similar to other combined clock and reset drivers. I wonder what you
> think about that approach:
> https://github.com/esmil/linux/commit/36f15e1b827b02d7f493dc5fce31060b21976e68
> and
> https://github.com/esmil/linux/commit/4ccafadb72968480aa3dd28c227fcccae411c13b#diff-ffec81f902f810cb210012c25e8d88217ea5b4021419a4206d1fd4dd19edfce8R471

I think we should use auxiliary bus and split the driver logically into
a reset driver in drivers/reset and a clk driver in drivers/clk. That
way the appropriate maintainers can review the code. There is only one
platform device with a single reg property and node in DT, but there are
two drivers.