Re: [PATCH] spi: intel: Fix the offset to get the 64K erase opcode

[Mika Westerberg]

On Wed, Oct 12, 2022 at 12:21:35PM -0300, Mauro Lima wrote:
> According to documentation, the 64K erase opcode is located in VSCC
> range [16:23] instead of [8:15].
> Use the proper value to shift the mask over the correct range.
> 
> Signed-off-by: Mauro Lima <mauro.lima@xxxxxxxxxxxxx>

Reviewed-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>