[PATCH v1 1/3] clk: loongson2: add clock dt-bindings include file
From: Yinbo Zhu
Date: Tue Oct 18 2022 - 09:06:01 EST
This file defines all loongson2 soc clock indexes, it should be
included in the device tree in which there's device using the
clocks.
Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
---
MAINTAINERS | 6 +++++
include/dt-bindings/clock/loongson2-clock.h | 29 +++++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 include/dt-bindings/clock/loongson2-clock.h
diff --git a/MAINTAINERS b/MAINTAINERS
index a162b6fba6fe..3db469f51d74 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11914,6 +11914,12 @@ S: Maintained
F: Documentation/devicetree/bindings/timer/loongson,ls2k-hpet.yaml
F: drivers/clocksource/loongson2_hpet.c
+LOONGSON2 SOC SERIES CLOCK DRIVER
+M: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
+L: linux-clk@xxxxxxxxxxxxxxx
+S: Maintained
+F: include/dt-bindings/clock/loongson2-clock.h
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@xxxxxxxxxxxx>
M: Sreekanth Reddy <sreekanth.reddy@xxxxxxxxxxxx>
diff --git a/include/dt-bindings/clock/loongson2-clock.h b/include/dt-bindings/clock/loongson2-clock.h
new file mode 100644
index 000000000000..23806408fe49
--- /dev/null
+++ b/include/dt-bindings/clock/loongson2-clock.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Author: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
+ * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
+#define __DT_BINDINGS_CLOCK_LOONGSON2_H
+
+#define LOONGSON2_REFCLK_100M 0
+#define LOONGSON2_NODE_PLL 1
+#define LOONGSON2_DDR_PLL 2
+#define LOONGSON2_DC_PLL 3
+#define LOONGSON2_PIX0_PLL 4
+#define LOONGSON2_PIX1_PLL 5
+#define LOONGSON2_NODE_CLK 6
+#define LOONGSON2_HDA_CLK 7
+#define LOONGSON2_GPU_CLK 8
+#define LOONGSON2_DDR_CLK 9
+#define LOONGSON2_GMAC_CLK 10
+#define LOONGSON2_DC_CLK 11
+#define LOONGSON2_APB_CLK 12
+#define LOONGSON2_USB_CLK 13
+#define LOONGSON2_SATA_CLK 14
+#define LOONGSON2_PIX0_CLK 15
+#define LOONGSON2_PIX1_CLK 16
+#define LOONGSON2_CLK_END 17
+
+#endif
--
2.20.1