Re: [PATCH v1 2/5] dt-bindings: soc: hpe: Add hpe,gxp-plreg

[Krzysztof Kozlowski]

On 25/10/2022 15:39, Verdun, Jean-Marie wrote:
> Hi Krzysztof,
> 

Use mailing list style of replying. I can bear the lack of wrapping (one
huge sentence), but top-post is a no.

> I think what we try to do is to introduce an abstraction layer between the interfaces and the drivers, as our CPLD interfaces are platform dependents. I mean the Power On control could be at address 0x09 on one platform or 0x119 on another one. We would like to find a way to avoid to have to change the driver code, but just feeding the driver with relevant datas, which could be into a platform dependent include file or through the proposed solution that Nick is promoting.

I think this was already said. Repeating it, with very similar words
will not help us...

Let me be then clear: I care little about your goal of abstracting some
driver code. I care about proper Devicetree bindings and proper
representation of hardware in Devicetree sources.

Looks like you want to hack around Devicetree to match your needs. This
does not work. I gave you the proposed solution based on my feeling and
limited understanding of what you have there. If this does not work for
you, then life - you need to find other solution.

> 
> If the CPLD memory address space was consistent between platform and generation that would be great but unfortunately that is not the case that is why we try to break down the dependency into the driver code and retrieve the data from another place.

I don't see how this argument is relevant to my questions. I did not
propose anything which would require some "memory address space
consistency".

Best regards,
Krzysztof