Re: [PATCH v2 2/2] clk: renesas: r9a07g044: Add CRU_SYSCLK and CRU_VCLK to no PM list

[Lad, Prabhakar]

Hi Geert,

THank you for the review.

On Wed, Oct 26, 2022 at 8:58 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Wed, Oct 26, 2022 at 3:42 AM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > CRU_SYSCLK and CRU_VCLK clocks need to be turned ON/OFF in particular
> > sequence for the CRU block hence add these clocks to
> > r9a07g044_no_pm_mod_clks[] array.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v1->v2
> > * Dropped usage of DEF_NO_PM() macro
> > * Added CRU_SYSCLK and CRU_VCLK to no PM list
> > * Updated commit message
>
> Thanks for the update!
>
> > --- a/drivers/clk/renesas/r9a07g044-cpg.c
> > +++ b/drivers/clk/renesas/r9a07g044-cpg.c
> > @@ -412,6 +412,11 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {
> >         MOD_CLK_BASE + R9A07G044_DMAC_ACLK,
> >  };
> >
> > +static const unsigned int r9a07g044_no_pm_mod_clks[] __initconst = {
>
> This cannot be __initconst, so please drop this keyword.
>
OK.

> > +       MOD_CLK_BASE + R9A07G044_CRU_SYSCLK,
> > +       MOD_CLK_BASE + R9A07G044_CRU_VCLK,
> > +};
>
> I believe I haven't seen patches yet to add support for these clocks?
> Perhaps these can be combined?
>
Ahh my bad, yes the patches have not been sent out for it, I'll
combine this while adding the clocks.

Cheers,
Prabhakar