Re: [PATCH v6 01/21] x86/tdx: Use enum to define page level of TDX supported page sizes

From: Dave Hansen
Date: Thu Oct 27 2022 - 11:27:15 EST


On 10/26/22 16:16, Kai Huang wrote:
> +/*
> + * Get the TDX page level based on the kernel page level. The caller
> + * to make sure only pass 4K/2M/1G kernel page level.
> + */
> +static inline enum tdx_pg_level to_tdx_pg_level(enum pg_level pglvl)
> +{
> + switch (pglvl) {
> + case PG_LEVEL_4K:
> + return TDX_PG_LEVEL_4K;
> + case PG_LEVEL_2M:
> + return TDX_PG_LEVEL_2M;
> + case PG_LEVEL_1G:
> + return TDX_PG_LEVEL_1G;
> + default:
> + WARN_ON_ONCE(1);
> + }
> + return TDX_PG_LEVEL_NUM;
> +}

Is TDX_PG_LEVEL_NUM part of the ABI? Or, is this going to accidentally
pass a whacky value to the SEAM module?

This needs something like this at the call-site:

page_size = to_tdx_pg_level(pg_level);
if (page_size >= TDX_PG_LEVEL_NUM)
return false;