RE: [PATCH 3/5] dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client

From: Pandey, Radhey Shyam
Date: Fri Oct 28 2022 - 03:17:26 EST


> -----Original Message-----
> From: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@xxxxxxx>
> Sent: Friday, October 28, 2022 10:40 AM
> To: vkoul@xxxxxxxxxx; robh+dt@xxxxxxxxxx;
> krzysztof.kozlowski+dt@xxxxxxxxxx; lars@xxxxxxxxxx;
> adrianml@xxxxxxxxxxxxxx
> Cc: dmaengine@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Simek, Michal
> <michal.simek@xxxxxxx>; Pandey, Radhey Shyam
> <radhey.shyam.pandey@xxxxxxx>; Sarangi, Anirudha
> <anirudha.sarangi@xxxxxxx>; Katakam, Harini
> <harini.katakam@xxxxxxx>; Gaddam, Sarath Babu Naidu
> <sarath.babu.naidu.gaddam@xxxxxxx>; git (AMD-Xilinx) <git@xxxxxxx>
> Subject: [PATCH 3/5] dmaengine: xilinx_dma: Pass AXI4-Stream control
> words to dma client
>
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxxxxx>
>
> Read DT property to check if AXI DMA is connected to streaming IP i.e
> axiethernet. If connected pass AXI4-Stream control words to dma client using
> metadata_ops dmaengine API.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxxxxx>
> Signed-off-by: Sarath Babu Naidu Gaddam
> <sarath.babu.naidu.gaddam@xxxxxxx>
> ---
> drivers/dma/xilinx/xilinx_dma.c | 37
> +++++++++++++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c
> b/drivers/dma/xilinx/xilinx_dma.c index 8cd4e69dc7b4..b69e0482a50f
> 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -493,6 +493,7 @@ struct xilinx_dma_config {
> * @s2mm_chan_id: DMA s2mm channel identifier
> * @mm2s_chan_id: DMA mm2s channel identifier
> * @max_buffer_len: Max buffer length
> + * @has_axistream_connected: AXI DMA connected to AXI Stream IP
> */
> struct xilinx_dma_device {
> void __iomem *regs;
> @@ -511,6 +512,7 @@ struct xilinx_dma_device {
> u32 s2mm_chan_id;
> u32 mm2s_chan_id;
> u32 max_buffer_len;
> + bool has_axistream_connected;
> };
>
> /* Macros */
> @@ -623,6 +625,29 @@ static inline void xilinx_aximcdma_buf(struct
> xilinx_dma_chan *chan,
> }
> }
>
> +/**
> + * xilinx_dma_get_metadata_ptr- Populate metadata pointer and payload
> +length
> + * @tx: async transaction descriptor
> + * @payload_len: metadata payload length
> + * @max_len: metadata max length
> + * Return: The app field pointer.
> + */
> +static void *xilinx_dma_get_metadata_ptr(struct dma_async_tx_descriptor
> *tx,
> + size_t *payload_len, size_t
> *max_len) {
> + struct xilinx_dma_tx_descriptor *desc = to_dma_tx_descriptor(tx);
> + struct xilinx_axidma_tx_segment *seg;
> +
> + *max_len = *payload_len = sizeof(u32) *
> XILINX_DMA_NUM_APP_WORDS;
> + seg = list_first_entry(&desc->segments,
> + struct xilinx_axidma_tx_segment, node);
> + return seg->hw.app;
> +}
> +
> +static struct dma_descriptor_metadata_ops xilinx_dma_metadata_ops = {
> + .get_ptr = xilinx_dma_get_metadata_ptr, };
> +
> /* -----------------------------------------------------------------------------
> * Descriptors and segments alloc and free
> */
> @@ -2326,6 +2351,9 @@ static struct dma_async_tx_descriptor
> *xilinx_dma_prep_dma_cyclic(
> segment->hw.control |= XILINX_DMA_BD_EOP;
> }
>
> + if (chan->xdev->has_axistream_connected)
> + desc->async_tx.metadata_ops = &xilinx_dma_metadata_ops;
> +
> return &desc->async_tx;
>
> error:
> @@ -3065,6 +3093,11 @@ static int xilinx_dma_probe(struct
> platform_device *pdev)
> }
> }
>
> + if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {

xlnx,axistream-connected is an optional property for both AXIDMA and
MCDMA. Please extend its implementation for the MCDMA support.


> + xdev->has_axistream_connected =
> + of_property_read_bool(node, "xlnx,axistream-
> connected");
> + }
> +
> if (xdev->dma_config->dmatype == XDMA_TYPE_VDMA) {
> err = of_property_read_u32(node, "xlnx,num-fstores",
> &num_frames);
> @@ -3090,6 +3123,10 @@ static int xilinx_dma_probe(struct
> platform_device *pdev)
> else
> xdev->ext_addr = false;
>
> + /* Set metadata mode */
> + if (xdev->has_axistream_connected)
> + xdev->common.desc_metadata_modes =
> DESC_METADATA_ENGINE;
> +
> /* Set the dma mask bits */
> err = dma_set_mask_and_coherent(xdev->dev,
> DMA_BIT_MASK(addr_width));
> if (err < 0) {
> --
> 2.25.1