Re: [PATCH v2] perf list: Add PMU pai_ext event description for IBM z16

[Thomas Richter]

On 11/15/22 14:10, Arnaldo Carvalho de Melo wrote:
> Em Tue, Nov 15, 2022 at 09:58:22AM +0100, Thomas Richter escreveu:
>> On 11/14/22 17:06, Arnaldo Carvalho de Melo wrote:
>>> Em Fri, Nov 11, 2022 at 02:54:02PM +0100, Thomas Richter escreveu:
>>>> Add the event description for the IBM z16 pai_ext PMU released with
>>>> commit c432fefe8e62 ("s390/pai: Add support for PAI Extension 1 NNPA counters")
> 
>>>> The document SA22-7832-13 "z/Architecture Principles of Operation",
>>>> published May, 2022, contains the description of the Processor
>>>> Activity Instrumentation Facility and the NNPA counter set., See
>>>> Pages 5-113 to 5-116.
> 
>>>> Signed-off-by: Thomas Richter <tmricht@xxxxxxxxxxxxx>
> 
>>>> --- /dev/null
>>>> +++ b/tools/perf/pmu-events/arch/s390/cf_z16/pai_ext.json
>>>> @@ -0,0 +1,198 @@
>>>> +[
>>>> +	{
>>>> +		"Unit": "PAI-EXT",
>>>> +		"EventCode": "6144",
>>>> +		"EventName": "NNPA_ALL",
>>>> +		"BriefDescription": "NNPA ALL",
>>>> +		"PublicDescription": "Sum of all non zero NNPA counters"
>>>> +	},
> 
>>> Since the Brief description mentions NNPA, shouldn't the Public
>>> Description expand on this "NNPA" acronym?, something like:
> 
>>> Oops, can't expand on that since there isn't a link to that SA22-7832-13
>>> document.
> 
>>> Googling for it...
> 
>>> https://www-40.ibm.com/servers/resourcelink/svc03100.nsf/pages/zResourceLinkUrl?OpenDocument&url=http://www.ibm.com/servers/resourcelink/lib03010.nsf/0/B9DE5F05A9D57819852571C500428F9A/$file/SA22-7832-13.pdf
> 
>>> Ok, requires registration.
> 
>>> I wonder what is the value of these descriptions then :-\
> 
>>> I miss Ingo jumping into these discussions :-)
>  
>> I added Andreas Krebbel to the discussion, he knows more than I on this counters.
>  
>> NNPA stands for Neural Networks Processing Assist. This is a new feature in 
>> the IBM z16. Here is a quote from Document SG2489-51 IBM z16 (3931) Technical Guide:
>  
>> <START-OF-QUOTE>
>>   "The new IBM z16 microprocessor chip, also called the IBM Telum processor, integrates a
>>    new AI accelerator. This innovation brings incredible value to applications and workloads that
>>    are running on IBM Z platform.
>>    Customers can benefit from the integrated AI accelerator by adding AI operations that are
>>    used to perform fraud prevention and fraud detection, customer behavior predictions, and
>>    supply chain operations. All of these operations are done in real time and fully integrated in
>>    transactional workloads. As a result, valuable insights are gained from their data instantly.
>>
>>    ...
>>    The AI accelerator is driven by the new Neural Networks Processing Assist (NNPA)
>>    instruction.
>>    NNPA is a new nonprivileged Complex Instruction Set Computer (CISC) memory-to-memory
>>    instruction that operates on tensor objects that are in user program’s memory. AI functions
>>    and macros are abstracted by NNPA."
>> <END-OF-QUOTE>
>>
>> This intension of this patch is to give a small hint on what these NNPA counters are
>> supposed to count and operate on. A full explanation is given in the document
>> SA22-7832-13 "z/Architecture Principles of Operation", Chapter 26, pp 26-1 to 26-115.
>>
>> If you think this small description is not worth it, then we can drop the patch.
> 
> So perhaps:
> 
> +	{
> +		"Unit": "PAI-EXT",
> +		"EventCode": "6144",
> +		"EventName": "NNPA_ALL",
> +		"BriefDescription": "NNPA ALL",
> +		"PublicDescription": "Sum of all non zero NNPA (Neural Networks Processing Assist) counters"
> +	},
> 
> ?
> 
> - Arnaldo

Ahhh, now I get it. 

Yes I will provide a patch with the first mention of NNPA have 
the abbreviation explained, as you pointed out.

Thanks.

-- 
Thomas Richter, Dept 3303, IBM s390 Linux Development, Boeblingen, Germany
--
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