While bringing up the cadence-quadspi driver on a customer board,What is the peripheral's maximum? Is the peripheral a flash?
I discovered that the baud divisor calculation can exceed the
peripheral's maximum in some circumstances. This will prevent it.
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@xxxxxxxxxxx>
---
drivers/spi/spi-cadence-quadspi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 447230547945..250575fb7b0e 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1119,6 +1119,10 @@ static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)
/* Recalculate the baudrate divisor based on QSPI specification. */
div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1;
+ /* Maximum baud divisor */
+ if (div > CQSPI_REG_CONFIG_BAUD_MASK)
+ div = CQSPI_REG_CONFIG_BAUD_MASK;I would not encourage this either.
+
reg = readl(reg_base + CQSPI_REG_CONFIG);
reg &= ~(CQSPI_REG_CONFIG_BAUD_MASK << CQSPI_REG_CONFIG_BAUD_LSB);
reg |= (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB;