Re: [PATCH] spi: cadence-quadspi: Add upper limit safety check to baudrate divisor

From: Dhruva Gole
Date: Thu Nov 24 2022 - 01:46:30 EST


Hi Nathan,
Thanks for your contribution.
However, there are a few issues that I would like you to address.

On 24/11/22 02:47, Nathan Barrett-Morrison wrote:
While bringing up the cadence-quadspi driver on a customer board,
I discovered that the baud divisor calculation can exceed the
peripheral's maximum in some circumstances. This will prevent it.
What is the peripheral's maximum? Is the peripheral a flash?
Please define what you mean by "some circumstances".


Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@xxxxxxxxxxx>
---
drivers/spi/spi-cadence-quadspi.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 447230547945..250575fb7b0e 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1119,6 +1119,10 @@ static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)
/* Recalculate the baudrate divisor based on QSPI specification. */
div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1;
+ /* Maximum baud divisor */
+ if (div > CQSPI_REG_CONFIG_BAUD_MASK)

I don't think comparing "greater than" with a MASK is atall a good idea.

+ div = CQSPI_REG_CONFIG_BAUD_MASK;
I would not encourage this either.


+
reg = readl(reg_base + CQSPI_REG_CONFIG);
reg &= ~(CQSPI_REG_CONFIG_BAUD_MASK << CQSPI_REG_CONFIG_BAUD_LSB);
reg |= (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB;

Either come up with a better MACRO, or if what I understand
is correct, the peripheral's max value will depend, well
on the _peripheral_ in which case it is that "peripheral" driver's
responsibility to properly tell the controller what to do.


Again, I don't fully understand your situation is as in
what is the peripheral you are using. So please elaborate on that.

Importantly, I would suggest that you _NEVER_ compare ANY value to a
MASK Macro. MASK Macros are meant to MASK bits.



--
Thanks and Regards,
Dhruva Gole