[PATCH v1 14/26] net: dsa: microchip: KSZ88x3 fix loopback support

From: Oleksij Rempel
Date: Mon Nov 28 2022 - 07:03:22 EST


With current code loopback is not working and selftest will always fail.
Fix register and bit offsets to make loopback on KSZ88x3 switches.

Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
---
drivers/net/dsa/microchip/ksz8795.c | 24 ++++++++++++++++++------
drivers/net/dsa/microchip/ksz8795_reg.h | 1 +
2 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
index 208cf4dde397..a6d5de41a754 100644
--- a/drivers/net/dsa/microchip/ksz8795.c
+++ b/drivers/net/dsa/microchip/ksz8795.c
@@ -625,8 +625,13 @@ int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
if (ret)
return ret;

- if (restart & PORT_PHY_LOOPBACK)
- data |= BMCR_LOOPBACK;
+ if (ksz_is_ksz88x3(dev)) {
+ if (restart & KSZ8873_PORT_PHY_LOOPBACK)
+ data |= BMCR_LOOPBACK;
+ } else {
+ if (restart & PORT_PHY_LOOPBACK)
+ data |= BMCR_LOOPBACK;
+ }
if (ctrl & PORT_FORCE_100_MBIT)
data |= BMCR_SPEED100;
if (ksz_is_ksz88x3(dev)) {
@@ -849,10 +854,17 @@ int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
data |= PORT_FORCE_MDIX;
else
data &= ~PORT_FORCE_MDIX;
- if (val & BMCR_LOOPBACK)
- data |= PORT_PHY_LOOPBACK;
- else
- data &= ~PORT_PHY_LOOPBACK;
+ if (ksz_is_ksz88x3(dev)) {
+ if (val & BMCR_LOOPBACK)
+ data |= KSZ8873_PORT_PHY_LOOPBACK;
+ else
+ data &= ~KSZ8873_PORT_PHY_LOOPBACK;
+ } else {
+ if (val & BMCR_LOOPBACK)
+ data |= PORT_PHY_LOOPBACK;
+ else
+ data &= ~PORT_PHY_LOOPBACK;
+ }

if (data != restart) {
ret = ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL],
diff --git a/drivers/net/dsa/microchip/ksz8795_reg.h b/drivers/net/dsa/microchip/ksz8795_reg.h
index 0bdceb534192..08204da7d621 100644
--- a/drivers/net/dsa/microchip/ksz8795_reg.h
+++ b/drivers/net/dsa/microchip/ksz8795_reg.h
@@ -262,6 +262,7 @@
#define PORT_AUTO_MDIX_DISABLE BIT(2)
#define PORT_FORCE_MDIX BIT(1)
#define PORT_MAC_LOOPBACK BIT(0)
+#define KSZ8873_PORT_PHY_LOOPBACK BIT(0)

#define REG_PORT_1_STATUS_2 0x1E
#define REG_PORT_2_STATUS_2 0x2E
--
2.30.2