Re: [PATCH v3 1/2] dt-bindings: interconnect: Add Qualcomm SM8550

[Krzysztof Kozlowski]

On 29/11/2022 14:12, Abel Vesa wrote:
> The Qualcomm SM8550 SoC has several bus fabrics that could be
> controlled and tuned dynamically according to the bandwidth demand.
> 
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,sm8550-aggre1-noc
> +              - qcom,sm8550-aggre2-noc
> +              - qcom,sm8550-pcie-anoc
> +    then:
> +      required:
> +        - clocks
> +    else:
> +      properties:
> +        clocks: false
> +
> +required:
> +  - compatible
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +      #include <dt-bindings/clock/qcom,sm8550-gcc.h>
> +      #include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>
> +      #include <dt-bindings/clock/qcom,rpmh.h>

Keep headers sorted.... but actually these two look like not used. If
you want to mention the header for interconnect IDs, you can add it in
top level descritpion.

> +
> +      clk_virt: interconnect-0 {
> +             compatible = "qcom,sm8550-clk-virt";
> +             #interconnect-cells = <2>;
> +             qcom,bcm-voters = <&apps_bcm_voter>;
> +      };
> +
> +      aggre1_noc: interconnect@16e0000 {
> +             compatible = "qcom,sm8550-aggre1-noc";
> +             reg = <0x016e0000 0x14400>;
> +             #interconnect-cells = <2>;
> +             clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> +                      <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
> +             qcom,bcm-voters = <&apps_bcm_voter>;
> +      };

Your DTS example is oddly indented. I missed it during previous review.
DTS examples go either with 2 or 4 spaces.


Best regards,
Krzysztof