RE: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
From: Ping-Ke Shih
Date: Wed Nov 30 2022 - 19:54:46 EST
> -----Original Message-----
> From: JunASAKA <JunASAKA@xxxxxxxxxxxxx>
> Sent: Wednesday, November 30, 2022 10:09 PM
> To: Jes.Sorensen@xxxxxxxxx
> Cc: kvalo@xxxxxxxxxx; davem@xxxxxxxxxxxxx; edumazet@xxxxxxxxxx; kuba@xxxxxxxxxx; pabeni@xxxxxxxxxx;
> linux-wireless@xxxxxxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; JunASAKA
> <JunASAKA@xxxxxxxxxxxxx>
> Subject: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>
> Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
> issues for rtl8192eu chips by replacing the arguments with
> the ones in the updated official driver.
I think it would be better if you can point out which version you use, and
people will not modify them back to old version suddenly.
>
> Signed-off-by: JunASAKA <JunASAKA@xxxxxxxxxxxxx>
> ---
> .../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
> 1 file changed, 54 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> index b06508d0cd..82346500f2 100644
> --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
[...]
> @@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
>
> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>
> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
> +
> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>
> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
> +
I think this is a test code of vendor driver. No need them here.
> /* Path B IQK setting */
> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
>
> - rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
> + rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
> rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
>
> /* LO calibration setting */
> - rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
> + rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
>
> /* One shot, path A LOK & IQK */
> rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
[...]
I have compared your patch with internal code, and they are the same.
But, I don't have a test.
Ping-Ke