Re: [PATCH 1/2] RISC-V: Align the shadow stack

From: Jisheng Zhang
Date: Thu Dec 01 2022 - 11:32:22 EST


On Tue, Nov 29, 2022 at 06:35:14PM -0800, Palmer Dabbelt wrote:
> The standard RISC-V ABIs all require 16-byte stack alignment. We're
> only calling that one function on the shadow stack so I doubt it'd
> result in a real issue, but might as well keep this lined up.
>
> Fixes: 31da94c25aea ("riscv: add VMAP_STACK overflow detection")
> Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>

Reviewed-by: Jisheng Zhang <jszhang@xxxxxxxxxx>

> ---
> arch/riscv/kernel/traps.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index be54ccea8c47..acdfcacd7e57 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -206,7 +206,7 @@ static DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)],
> * shadow stack, handled_ kernel_ stack_ overflow(in kernel/entry.S) is used
> * to get per-cpu overflow stack(get_overflow_stack).
> */
> -long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)];
> +long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)] __aligned(16);
> asmlinkage unsigned long get_overflow_stack(void)
> {
> return (unsigned long)this_cpu_ptr(overflow_stack) +
> --
> 2.38.1
>