Re: [PATCH bpf v2] riscv, bpf: Emit fixed-length instructions for BPF_PSEUDO_FUNC

From: Pu Lehui
Date: Mon Dec 05 2022 - 22:38:00 EST




On 2022/12/2 18:54, Björn Töpel wrote:
Pu Lehui <pulehui@xxxxxxxxxxxxxxx> writes:

From: Pu Lehui <pulehui@xxxxxxxxxx>

For BPF_PSEUDO_FUNC instruction, verifier will refill imm with
correct addresses of bpf_calls and then run last pass of JIT.
Since the emit_imm of RV64 is variable-length, which will emit
appropriate length instructions accorroding to the imm, it may
broke ctx->offset, and lead to unpredictable problem, such as
inaccurate jump. So let's fix it with fixed-length instructions.

Fixes: 69c087ba6225 ("bpf: Add bpf_for_each_map_elem() helper")
Signed-off-by: Pu Lehui <pulehui@xxxxxxxxxx>
Suggested-by: Björn Töpel <bjorn@xxxxxxxxxxxx>
---
arch/riscv/net/bpf_jit_comp64.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index eb99df41fa33..9723f34f7a06 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -139,6 +139,19 @@ static bool in_auipc_jalr_range(s64 val)
val < ((1L << 31) - (1L << 11));
}
+/* Emit fixed-length instructions for address */
+static void emit_addr(u8 rd, u64 addr, struct rv_jit_context *ctx)
+{
+ u64 ip = (u64)(ctx->insns + ctx->ninsns);
+ s64 off = addr - ip;
+ s64 upper = (off + (1 << 11)) >> 12;
+ s64 lower = ((off & 0xfff) << 52) >> 52;
+
+ emit(rv_auipc(rd, upper), ctx);
+ emit(rv_addi(rd, rd, lower), ctx);
+}

Nice! Two instructions are better than 6! :-)

One final thing. Please add a sanity check, that the range is correct,
e.g.:

if (!(addr && in_auipc_addi_range(off)))
return -1;


Hi Björn,

Sorry for replying so late. For BPF_PSEUDO_FUNC instruction, verifier will set insn[0].imm and insn[1].imm to 1 that make addr to 0x100000001 before extra pass, and also ctx->insns is NULL in iteration stage, all of these make off out of range of AUIPC-ADDI range, and return failed. We could add some special handling at different stages, but that seems a little weird. By the way, I do not really like emit_addr function with return value.

While a proper address is at least 2B alignment, and the valid address is from 0xffffffff00000000 to 0xffffffffffffffff, we can make address shifed 1 place to right, and addr >> 1 will always in the range of AUIPC-ADDI range. We can get rid of the range detection. The implementation is as follows:

static void emit_addr(u8 rd, u64 addr, struct rv_jit_context *ctx)
{
s64 imm = addr >> 1;
s64 upper = (imm + (1 << 11)) >> 12;
s64 lower = imm & 0xfff;

emit(rv_lui(rd, upper), ctx);
emit(rv_addi(rd, rd, lower), ctx);
emit(rv_slli(rd, rd, 1), ctx);
}

What do you think?

Regards,
Lehui

Have a look at emit_jump_and_link().


Thanks!
Björn