RE: [PATCH v6 tty-next 3/4] serial: 8250_pci1xxxx: Add RS485 support to quad-uart driver

[Kumaravel.Thiagarajan]

> -----Original Message-----
> From: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> Sent: Thursday, December 1, 2022 3:17 PM
> To: Kumaravel Thiagarajan - I21417 <Kumaravel.Thiagarajan@xxxxxxxxxxxxx>
> Subject: Re: [PATCH v6 tty-next 3/4] serial: 8250_pci1xxxx: Add RS485
> support to quad-uart driver
> 
> On Thu, 1 Dec 2022, Kumaravel Thiagarajan wrote:
> 
> > pci1xxxx uart supports RS485 mode of operation in the hardware with
> > auto-direction control with configurable delay for releasing RTS after
> > the transmission. This patch adds support for the RS485 mode.
> >
> >
> > +static int pci1xxxx_rs485_config(struct uart_port *port,
> > +                              struct ktermios *termios,
> > +                              struct serial_rs485 *rs485) {
> > +     u32 clock_div = readl(port->membase +
> > +UART_BAUD_CLK_DIVISOR_REG);
> 
> Maybe move this into the block where it's needed?
> 
> > +     u64 delay_in_baud_periods;
> > +     u32 baud_period_in_ns;
> > +     u32 data = 0;
> 
> data seems a bit too generic name for a variable? At minimum I'd suggest
> using cfg or mode_cfg (I couldn't guess where ADCL comes from, perhaps it
> has some component which would make the variable name better).

Hi Ilpo,

We just noticed after submitting v7 that this email of yours got forwarded to spam folder by our IT infrastructure automatically and we missed it.
We will take care of this in v8.

Thank You.

Regards,
Kumar