Re: [PATCH] arm64: dts: qcom: sm8150: Fix iommu sid values for PCIe nodes
From: Dmitry Baryshkov
Date: Thu Dec 08 2022 - 05:51:32 EST
On Wed, 7 Dec 2022 at 09:29, Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx> wrote:
>
> Fix the iommu sid values for the PCIe nodes present on
> Qualcomm SM8150 SoC dtsi (in sync the with downstream code).
The commit message describes what you did, not why. Is there any
actual issue that you are trying to solve?
It makes me wonder because all modern Qualcomm platforms share more or
less the same setup.
>
> Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
> Cc: Bjorn Andersson <andersson@xxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
No need to have regular maintainers in Cc tags. Please use regular
git-send-email arguments instead.
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 32 ++++++++++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index d1b64280ab0b..e88d1617a1ab 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1810,9 +1810,23 @@ pcie0: pci@1c00000 {
> "slave_q2a",
> "tbu";
>
> - iommus = <&apps_smmu 0x1d80 0x7f>;
> + iommus = <&apps_smmu 0x1d80 0xf>;
> iommu-map = <0x0 &apps_smmu 0x1d80 0x1>,
> <0x100 &apps_smmu 0x1d81 0x1>;
it looks like the patch was not even compile-tested.
> + <0x200 &apps_smmu 0x1d82 0x1>,
> + <0x300 &apps_smmu 0x1d83 0x1>,
> + <0x400 &apps_smmu 0x1d84 0x1>,
> + <0x500 &apps_smmu 0x1d85 0x1>,
> + <0x600 &apps_smmu 0x1d86 0x1>,
> + <0x700 &apps_smmu 0x1d87 0x1>,
> + <0x800 &apps_smmu 0x1d88 0x1>,
> + <0x900 &apps_smmu 0x1d89 0x1>,
> + <0xa00 &apps_smmu 0x1d8a 0x1>,
> + <0xb00 &apps_smmu 0x1d8b 0x1>,
> + <0xc00 &apps_smmu 0x1d8c 0x1>,
> + <0xd00 &apps_smmu 0x1d8d 0x1>,
> + <0xe00 &apps_smmu 0x1d8e 0x1>,
> + <0xf00 &apps_smmu 0x1d8f 0x1>;
>
> resets = <&gcc GCC_PCIE_0_BCR>;
> reset-names = "pci";
> @@ -1909,9 +1923,23 @@ pcie1: pci@1c08000 {
> assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
> assigned-clock-rates = <19200000>;
>
> - iommus = <&apps_smmu 0x1e00 0x7f>;
> + iommus = <&apps_smmu 0x1e00 0xf>;
> iommu-map = <0x0 &apps_smmu 0x1e00 0x1>,
> <0x100 &apps_smmu 0x1e01 0x1>;
> + <0x200 &apps_smmu 0x1e02 0x1>,
> + <0x300 &apps_smmu 0x1e03 0x1>,
> + <0x400 &apps_smmu 0x1e04 0x1>,
> + <0x500 &apps_smmu 0x1e05 0x1>,
> + <0x600 &apps_smmu 0x1e06 0x1>,
> + <0x700 &apps_smmu 0x1e07 0x1>,
> + <0x800 &apps_smmu 0x1e08 0x1>,
> + <0x900 &apps_smmu 0x1e09 0x1>,
> + <0xa00 &apps_smmu 0x1e0a 0x1>,
> + <0xb00 &apps_smmu 0x1e0b 0x1>,
> + <0xc00 &apps_smmu 0x1e0c 0x1>,
> + <0xd00 &apps_smmu 0x1e0d 0x1>,
> + <0xe00 &apps_smmu 0x1e0e 0x1>,
> + <0xf00 &apps_smmu 0x1e0f 0x1>;
>
> resets = <&gcc GCC_PCIE_1_BCR>;
> reset-names = "pci";
> --
> 2.38.1
>
--
With best wishes
Dmitry