Re: [PATCH v4 4/8] mfd: intel-m10-bmc: Support multiple CSR register layouts

[Xu Yilun]

On 2022-12-11 at 12:39:09 +0200, Ilpo Järvinen wrote:
> There are different addresses for the MAX10 CSR registers. Introducing
> a new data structure m10bmc_csr_map for the register definition of
> MAX10 CSR.
> 
> Provide the csr_map for SPI.
> 
> Co-developed-by: Tianfei zhang <tianfei.zhang@xxxxxxxxx>
> Signed-off-by: Tianfei zhang <tianfei.zhang@xxxxxxxxx>
> Reviewed-by: Russ Weight <russell.h.weight@xxxxxxxxx>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>

Reviewed-by: Xu Yilun <yilun.xu@xxxxxxxxx>