Re: [PATCH v2 3/7] arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4

From: Konrad Dybcio
Date: Thu Dec 15 2022 - 07:53:46 EST




On 14.12.2022 18:11, Brian Masney wrote:
> In preparation for adding the missing SPI and I2C nodes to
> sc8280xp.dtsi, it was decided to rename all of the existing qupX_
> uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
> and rename qup0_i2c4 to i2c4. Note that some nodes are moved in the
> file by this patch to preserve the expected sort order in the file.
>
> Signed-off-by: Brian Masney <bmasney@xxxxxxxxxx>
> Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@xxxxxxxxxx/
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Konrad
> This is a new patch that's introduced in v2.
>
> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 58 +++++++++----------
> .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 58 +++++++++----------
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 3 files changed, 59 insertions(+), 59 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> index 0de1bdb68e2c..c37a9d93a2a8 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> @@ -228,6 +228,27 @@ vreg_l9d: ldo9 {
> };
> };
>
> +&i2c4 {
> + clock-frequency = <400000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4_default>;
> +
> + status = "okay";
> +
> + touchscreen@10 {
> + compatible = "hid-over-i2c";
> + reg = <0x10>;
> +
> + hid-descr-addr = <0x1>;
> + interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> + vdd-supply = <&vreg_misc_3p3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts0_default>;
> + };
> +};
> +
> &i2c21 {
> clock-frequency = <400000>;
>
> @@ -334,27 +355,6 @@ &qup0 {
> status = "okay";
> };
>
> -&qup0_i2c4 {
> - clock-frequency = <400000>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&qup0_i2c4_default>;
> -
> - status = "okay";
> -
> - touchscreen@10 {
> - compatible = "hid-over-i2c";
> - reg = <0x10>;
> -
> - hid-descr-addr = <0x1>;
> - interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> - vdd-supply = <&vreg_misc_3p3>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&ts0_default>;
> - };
> -};
> -
> &qup1 {
> status = "okay";
> };
> @@ -494,6 +494,14 @@ hastings_reg_en: hastings-reg-en-state {
> &tlmm {
> gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
>
> + i2c4_default: i2c4-default-state {
> + pins = "gpio171", "gpio172";
> + function = "qup4";
> +
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> i2c21_default: i2c21-default-state {
> pins = "gpio81", "gpio82";
> function = "qup21";
> @@ -598,14 +606,6 @@ wake-n-pins {
> };
> };
>
> - qup0_i2c4_default: qup0-i2c4-default-state {
> - pins = "gpio171", "gpio172";
> - function = "qup4";
> -
> - bias-disable;
> - drive-strength = <16>;
> - };
> -
> tpad_default: tpad-default-state {
> int-n-pins {
> pins = "gpio182";
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index d7af2040cbcb..ec06b6216408 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -282,6 +282,28 @@ vreg_l9d: ldo9 {
> };
> };
>
> +&i2c4 {
> + clock-frequency = <400000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4_default>;
> +
> + status = "okay";
> +
> + /* FIXME: verify */
> + touchscreen@10 {
> + compatible = "hid-over-i2c";
> + reg = <0x10>;
> +
> + hid-descr-addr = <0x1>;
> + interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> + vdd-supply = <&vreg_misc_3p3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts0_default>;
> + };
> +};
> +
> &i2c21 {
> clock-frequency = <400000>;
>
> @@ -554,28 +576,6 @@ &qup0 {
> status = "okay";
> };
>
> -&qup0_i2c4 {
> - clock-frequency = <400000>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&qup0_i2c4_default>;
> -
> - status = "okay";
> -
> - /* FIXME: verify */
> - touchscreen@10 {
> - compatible = "hid-over-i2c";
> - reg = <0x10>;
> -
> - hid-descr-addr = <0x1>;
> - interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> - vdd-supply = <&vreg_misc_3p3>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&ts0_default>;
> - };
> -};
> -
> &qup1 {
> status = "okay";
> };
> @@ -698,6 +698,13 @@ hall_int_n_default: hall-int-n-state {
> bias-disable;
> };
>
> + i2c4_default: i2c4-default-state {
> + pins = "gpio171", "gpio172";
> + function = "qup4";
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> i2c21_default: i2c21-default-state {
> pins = "gpio81", "gpio82";
> function = "qup21";
> @@ -801,13 +808,6 @@ wake-n-pins {
> };
> };
>
> - qup0_i2c4_default: qup0-i2c4-default-state {
> - pins = "gpio171", "gpio172";
> - function = "qup4";
> - bias-disable;
> - drive-strength = <16>;
> - };
> -
> tpad_default: tpad-default-state {
> int-n-pins {
> pins = "gpio182";
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 929365cff555..f1111cd7f679 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -858,7 +858,7 @@ qup0: geniqup@9c0000 {
>
> status = "disabled";
>
> - qup0_i2c4: i2c@990000 {
> + i2c4: i2c@990000 {
> compatible = "qcom,geni-i2c";
> reg = <0 0x00990000 0 0x4000>;
> clock-names = "se";