RISC-V semihosting spec [1] is built on top of the existing Arm one;Ping?
we can add RISC-V earlycon semihost driver easily.
This series refactors the existing driver a little bit, to move smh_putc()
variants in respective arch's semihost.h, then we can implement RISC-V's
version in the riscv arch directory.
Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
Changes in v3:
- add #ifdef in the header to prevent from multiple inclusion
- add forward-declare struct uart_port
- add a Link tag in the commit message