Re: [PATCH v4 3/3] mtd: spi-nor: Add support for IS25LX256 operating in 1S-8S-8S octal read mode

From: Tudor Ambarus
Date: Mon Dec 26 2022 - 03:17:19 EST




On 26.12.2022 10:04, Tudor Ambarus wrote:
Hi, Nathan,

The series is starting to look good, but I'll need another version,
please.

On 02.12.2022 15:55, Nathan Barrett-Morrison wrote:
This adds the IS25LX256 chip into the ISSI flash_info parts table

Describe your changes in imperative mood, e.g. "Add support for
S25LX256" instead of "This adds ..."

It may worth to re-read
https://www.kernel.org/doc/html/latest/process/submitting-patches.html
once in a while.


Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@xxxxxxxxxxx>
---
  drivers/mtd/spi-nor/issi.c | 32 ++++++++++++++++++++++++++++++++
  1 file changed, 32 insertions(+)

diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..362bc3603d8f 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -29,6 +29,35 @@ static const struct spi_nor_fixups is25lp256_fixups = {
      .post_bfpt = is25lp256_post_bfpt_fixups,
  };
+static int
+is25lx256_post_bfpt_fixups(struct spi_nor *nor,
+               const struct sfdp_parameter_header *bfpt_header,
+               const struct sfdp_bfpt *bfpt)
+{
+    /*
+     * IS25LX256 supports both 1S-1S-8S and 1S-8S-8S.
+     * However, the BFPT does not contain any information denoting this
+     * functionality, so the proper fast read opcodes are never setup.
+     * We're correcting this issue via the fixup below.  Page program
+     * commands are detected and setup properly via the 4BAIT lookup.
+     */

Why don't you set the READ support when parsing the 4bait table? We need
to see the SFDP dump to determine how we treat this. I'm not sure a
post_bfpt hook is the right thing to do for this flash.

Thanks,
ta