RE: [RFC PATCH v1 13/19] rtw88: mac: Add support for SDIO specifics in the power on sequence

[Ping-Ke Shih]

> -----Original Message-----
> From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> Sent: Wednesday, December 28, 2022 7:30 AM
> To: linux-wireless@xxxxxxxxxxxxxxx
> Cc: Yan-Hsuan Chuang <tony0620emma@xxxxxxxxx>; Kalle Valo <kvalo@xxxxxxxxxx>; Ulf Hansson
> <ulf.hansson@xxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx;
> linux-mmc@xxxxxxxxxxxxxxx; Chris Morgan <macroalpha82@xxxxxxxxx>; Nitin Gupta <nitin.gupta981@xxxxxxxxx>;
> Neo Jou <neojou@xxxxxxxxx>; Ping-Ke Shih <pkshih@xxxxxxxxxxx>; Jernej Skrabec <jernej.skrabec@xxxxxxxxx>;
> Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> Subject: [RFC PATCH v1 13/19] rtw88: mac: Add support for SDIO specifics in the power on sequence
> 
> Add the code specific to SDIO HCI in the MAC power on sequence. This is
> based on the RTL8822BS and RTL8822CS vendor drivers.
> 
> Co-developed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> ---
>  drivers/net/wireless/realtek/rtw88/mac.c | 41 ++++++++++++++++++++++--
>  1 file changed, 39 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/wireless/realtek/rtw88/mac.c b/drivers/net/wireless/realtek/rtw88/mac.c
> index 8e1fa824b32b..ad71f9838d1d 100644
> --- a/drivers/net/wireless/realtek/rtw88/mac.c
> +++ b/drivers/net/wireless/realtek/rtw88/mac.c
> @@ -7,6 +7,7 @@
>  #include "reg.h"
>  #include "fw.h"
>  #include "debug.h"
> +#include "sdio.h"
> 
>  void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
>  			 u8 primary_ch_idx)
> @@ -60,6 +61,7 @@ EXPORT_SYMBOL(rtw_set_channel_mac);
> 
>  static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
>  {
> +	unsigned int retry;
>  	u32 value32;
>  	u8 value8;
> 
> @@ -77,6 +79,26 @@ static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
>  	case RTW_HCI_TYPE_PCIE:
>  		rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS);
>  		break;
> +	case RTW_HCI_TYPE_SDIO:
> +		rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT(0));

BIT_HCI_SUS_REQ BIT(0)

> +
> +		for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) {
> +			if (rtw_read8(rtwdev, REG_SDIO_HSUS_CTRL) & BIT(1))

BIT_HCI_RESUME_RDY BIT(1)

> +				break;
> +
> +			usleep_range(10, 50);
> +		}
> +
> +		if (retry == RTW_PWR_POLLING_CNT) {
> +			rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]");
> +			return -ETIMEDOUT;
> +		}
> +
> +		if (rtw_sdio_is_sdio30_supported(rtwdev))
> +			rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));

BIT_USB_LPM_ACT_EN BIT(10)   // reg_addr +2, so bit >> 8

> +		else
> +			rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
> +		break;
>  	case RTW_HCI_TYPE_USB:
>  		break;
>  	default:

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