drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:466 gf100_gr_chan_new() warn: inconsistent returns '&gr->fecs.mutex'.
From: Dan Carpenter
Date: Thu Dec 29 2022 - 04:26:14 EST
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 72a85e2b0a1e1e6fb4ee51ae902730212b2de25c
commit: ca081fff6ecc63c86a99918230cc9b947bebae8a drm/nouveau/gr/gf100-: generate golden context during first object alloc
config: s390-randconfig-m041-20221225
compiler: s390-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Reported-by: Dan Carpenter <error27@xxxxxxxxx>
smatch warnings:
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:466 gf100_gr_chan_new() warn: inconsistent returns '&gr->fecs.mutex'.
vim +466 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 377 static int
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 378 gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 379 const struct nvkm_oclass *oclass,
e3c71eb27419b6 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-01-14 380 struct nvkm_object **pobject)
966a5b7daa15e1 drivers/gpu/drm/nouveau/nvc0_graph.c Ben Skeggs 2010-11-24 381 {
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 382 struct gf100_gr *gr = gf100_gr(base);
bfee3f3d97db88 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 383 struct gf100_gr_data *data = gr->mmio_data;
bfee3f3d97db88 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 384 struct gf100_gr_mmio *mmio = gr->mmio_list;
e3c71eb27419b6 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-01-14 385 struct gf100_gr_chan *chan;
019e4d76c6e91b drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2017-11-01 386 struct gf100_vmm_map_v0 args = { .priv = 1 };
227c95d90a3c50 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 387 struct nvkm_device *device = gr->base.engine.subdev.device;
966a5b7daa15e1 drivers/gpu/drm/nouveau/nvc0_graph.c Ben Skeggs 2010-11-24 388 int ret, i;
966a5b7daa15e1 drivers/gpu/drm/nouveau/nvc0_graph.c Ben Skeggs 2010-11-24 389
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 390 if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 391 return -ENOMEM;
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 392 nvkm_object_ctor(&gf100_gr_chan, oclass, &chan->object);
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 393 chan->gr = gr;
019e4d76c6e91b drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2017-11-01 394 chan->vmm = nvkm_vmm_ref(fifoch->vmm);
27f3d6cf803249 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 395 *pobject = &chan->object;
966a5b7daa15e1 drivers/gpu/drm/nouveau/nvc0_graph.c Ben Skeggs 2010-11-24 396
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 397 /* Generate golden context image. */
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 398 mutex_lock(&gr->fecs.mutex);
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 399 if (gr->data == NULL) {
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 400 ret = gf100_grctx_generate(gr, chan, fifoch->inst);
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 401 if (ret) {
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 402 nvkm_error(&base->engine.subdev, "failed to construct context\n");
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 403 return ret;
Needs a mutex_unlock(&gr->fecs.mutex);
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 404 }
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 405 }
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 406 mutex_unlock(&gr->fecs.mutex);
ca081fff6ecc63 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2022-06-01 407
ac1499d9573f4a drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c Ben Skeggs 2012-08-04 408 /* allocate memory for a "mmio list" buffer that's used by the HUB
ac1499d9573f4a drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c Ben Skeggs 2012-08-04 409 * fuc to modify some per-context register settings on first load
ac1499d9573f4a drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c Ben Skeggs 2012-08-04 410 * of the context.
ac1499d9573f4a drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c Ben Skeggs 2012-08-04 411 */
227c95d90a3c50 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 412 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x100,
227c95d90a3c50 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c Ben Skeggs 2015-08-20 413 false, &chan->mmio);
73a60c0d218a29 drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c Ben Skeggs 2012-07-13 414 if (ret)
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