Re: [PATCH v2 2/4] dt-bindings: clock: qcom,sc7280-lpasscc: Add resets for audioreach

[Krzysztof Kozlowski]

On 30/12/2022 14:43, Srinivasa Rao Mandadapu wrote:
> Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
> for audioreach based SC7280 platforms.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
> Tested-by: Mohammad Rafi Shaik <quic_mohs@xxxxxxxxxxx>
> ---
>  .../devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml         | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
> index 9c72b8e..40fc6ab 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
> @@ -31,13 +31,18 @@ properties:
>    '#clock-cells':
>      const: 1
>  
> +  '#reset-cells':
> +    const: 1
> +
>    reg:
>      items:
>        - description: LPASS top-cc register
> +      - description: LPASS reset-cgcr register

It's now even a bigger mess. First ABI break, then bring it back to
previous stage - so two IO addresses - but with different values! There
is no way this works with other systems or DTS users.

>  
>    reg-names:
>      items:
>        - const: top_cc
> +      - const: reset_cgcr


The 'reg-names' is only a helper, order and contents of 'reg' is fixed.

Best regards,
Krzysztof