Re: RFC on drivers/memory vs drivers/edac memory mapping for DDR Controller
From: Krzysztof Kozlowski
Date: Tue Jan 03 2023 - 09:25:29 EST
On 03/01/2023 14:47, Shenhar, Talel wrote:
> So how would you have the DT described and how would driver/s look like
> for cases that the unit registers are split interchangeably?
>
>>
>> You did not Cc relevant here mailing addresses (DT and Rob), so this
>> discussion might miss their feedback.
>>
>> How the drivers map IO address space is independent question and should
>> not determine the hardware description. You want to say that hardware
>> changes depending on OS? One OS means hardware is like that and on other
>> OS it's different?
BTW, you nicely skipped points of my email which are a bit
inconvenient,e.g. how you want to tie DTS and bindings to one specific
driver implementation and ignore the rest...
Best regards,
Krzysztof