Re: [PATCH 2/2] ARM: dts: aspeed: bletchley: enable wdtrst1

[Patrick Williams]

On Mon, Dec 26, 2022 at 01:45:35PM +0800, Potin Lai wrote:
> Enable WDTRST1 external signal to send a reset pluse to peripherals while
> BMC reset.

nit: s/pluse/pulse

> 
> Signed-off-by: Potin Lai <potin.lai.pt@xxxxxxxxx>
> ---
>  arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
> index 791f83aaac50..050ed7e810fa 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
> @@ -1064,3 +1064,14 @@ pinctrl_gpiov2_unbiased_default: gpiov2 {
>  		bias-disable;
>  	};
>  };
> +
> +&wdt1 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdtrst1_default>;
> +	aspeed,reset-type = "soc";
> +	aspeed,external-signal;
> +	aspeed,ext-push-pull;
> +	aspeed,ext-active-high;
> +	aspeed,ext-pulse-duration = <256>;
> +};
> -- 
> 2.31.1
> 

-- 
Patrick Williams

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