[PATCH v1 2/4] thermal: qoriq: add i.MX93 TMU support

[Alice Guo (OSS)]

From: Alice Guo <alice.guo@xxxxxxx>

The procedure to program the calibration table of i.MX93 TMU:
1. disable monitoring mode
2. configure TCMCFG
3. write TTCFGR with TTCFGR[CAL_PT] = n
4. write TSCFGR with the sensor value of the calibration point n
5. write TTRCRn associated with the calibration point n
Need to repeat steps 3—5 for all calibration points from the calibration
table provided by the TMU device node.

When TRITSR[V] = 1 and TRITSR[TP5] = 1, need to add 0.5K to
TRITSR[TEMP].

IPBRR0s of lx2160ardb, lx2162aqds and i.MX93 have the same value
0x01900201 so that use the compatible to determine whether the current
TMU belongs to i.MX93 or not.

Signed-off-by: Alice Guo <alice.guo@xxxxxxx>
Reviewed-by: Jacky Bai <ping.bai@xxxxxxx>
Reviewed-by: Ye Li <ye.li@xxxxxxx>
Acked-by: Jason Liu <jason.hui.liu@xxxxxxx>
---
 drivers/thermal/qoriq_thermal.c | 56 ++++++++++++++++++++++++++++++---
 1 file changed, 52 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index d111e218f362..18030bd68687 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -24,9 +24,11 @@
 #define TMTMIR_DEFAULT	0x0000000f
 #define TIER_DISABLE	0x0
 #define TEUMR0_V2		0x51009c00
+#define TEUMR0_V21		0x55010c00
 #define TMSARA_V2		0xe
 #define TMU_VER1		0x1
 #define TMU_VER2		0x2
+#define TMU_VER93		0x3
 
 #define REGS_TMR	0x000	/* Mode Register */
 #define TMR_DISABLE	0x0
@@ -52,6 +54,7 @@
 					    * Site Register
 					    */
 #define TRITSR_V	BIT(31)
+#define TRITSR_TP5	BIT(9)
 #define REGS_V2_TMSAR(n)	(0x304 + 16 * (n))	/* TMU monitoring
 						* site adjustment register
 						*/
@@ -114,10 +117,16 @@ static int tmu_get_temp(struct thermal_zone_device *tz, int *temp)
 				     10 * USEC_PER_MSEC))
 		return -ENODATA;
 
-	if (qdata->ver == TMU_VER1)
+	if (qdata->ver == TMU_VER1) {
 		*temp = (val & GENMASK(7, 0)) * MILLIDEGREE_PER_DEGREE;
-	else
+	} else if (qdata->ver == TMU_VER93) {
+		if (val & TRITSR_TP5)
+			*temp = milli_kelvin_to_millicelsius((val & GENMASK(8, 0)) * MILLIDEGREE_PER_DEGREE + 500);
+		else
+			*temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
+	} else {
 		*temp = kelvin_to_millicelsius(val & GENMASK(8, 0));
+	}
 
 	return 0;
 }
@@ -207,6 +216,33 @@ static int qoriq_tmu_calibration(struct device *dev,
 	return 0;
 }
 
+static int imx93_tmu_calibration(struct device *dev,
+				 struct qoriq_tmu_data *data)
+{
+	const u32 *calibration = NULL;
+	u32 cal_pt = 0;
+	u32 val = 0;
+	unsigned int len = 0;
+	unsigned int i = 0;
+
+	calibration = of_get_property(dev->of_node, "fsl,tmu-calibration", &len);
+	if (calibration == NULL || len / 8 > 16 || len % 8) {
+		dev_err(dev, "invalid tmu calibration\n");
+		return -ENODEV;
+	}
+
+	for (i = 0; i < len; i += 0x8, calibration += 2) {
+		cal_pt = i / 8;
+		regmap_write(data->regmap, REGS_TTCFGR, cal_pt);
+		val = of_read_number(calibration, 1);
+		regmap_write(data->regmap, REGS_TSCFGR, val);
+		val = of_read_number(calibration + 1, 1);
+		regmap_write(data->regmap, REGS_TTRnCR(cal_pt), val);
+	}
+
+	return 0;
+}
+
 static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 {
 	int i;
@@ -218,6 +254,11 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 
 	if (data->ver == TMU_VER1) {
 		regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
+	} else if (data->ver == TMU_VER93) {
+		regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
+		regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V21);
+		for (i = 0; i < SITES_MAX; i++)
+			regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
 	} else {
 		regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
 		regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
@@ -231,7 +272,7 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 
 static const struct regmap_range qoriq_yes_ranges[] = {
 	regmap_reg_range(REGS_TMR, REGS_TSCFGR),
-	regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
+	regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(15)),
 	regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
 	regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
 	regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
@@ -319,9 +360,15 @@ static int qoriq_tmu_probe(struct platform_device *pdev)
 	}
 	data->ver = (ver >> 8) & 0xff;
 
+	if (of_find_compatible_node(NULL, NULL, "fsl,imx93-tmu"))
+		data->ver = TMU_VER93;
+
 	qoriq_tmu_init_device(data);	/* TMU initialization */
 
-	ret = qoriq_tmu_calibration(dev, data);	/* TMU calibration */
+	if (data->ver == TMU_VER93)
+		ret = imx93_tmu_calibration(dev, data);
+	else
+		ret = qoriq_tmu_calibration(dev, data);	/* TMU calibration */
 	if (ret < 0)
 		return ret;
 
@@ -369,6 +416,7 @@ static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
 static const struct of_device_id qoriq_tmu_match[] = {
 	{ .compatible = "fsl,qoriq-tmu", },
 	{ .compatible = "fsl,imx8mq-tmu", },
+	{ .compatible = "fsl,imx93-tmu", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
-- 
2.17.1