[PATCH V2 0/2] phy: ti: j721e-wiz: Add support to manage type-C swap on Lane2 and lane3

[Sinthu Raja]

From: Sinthu Raja <sinthu.raja@xxxxxx>

Hi All,
This series of patch add support to enable lanes 2 and 3 swap by
configuring the LN23 bit of the SerDes WIZ control register. Also, 
it's possible that the Type-C plug orientation on the DIR line will 
be implemented through hardware design. In that situation, there 
won't be an external GPIO line available, but the driver still needs 
to address this since the DT won't use the typec-dir-gpios property. 
Update code to handle if typec-dir-gpios property is not specified in DT.

Changes in V2:
=============
Address review comments:
- Update commit description as per review comments.
- Restore code to check only debounce delay only if typec-dir-gpios property is specified in DT.
- Rename enum variable name from wiz_lane_typec_swap_mode to wiz_typec_master_lane.
- Rename lane_phy_reg variable as master_lane_num.
- Update inline comments.

V1: https://lore.kernel.org/lkml/20221213124854.3779-2-sinthu.raja@xxxxxx/T/

Sinthu Raja (2):
  phy: ti: j721e-wiz: Manage TypeC lane swap if typec-dir-gpios not
    specified
  phy: ti: j721e-wiz: Add support to enable LN23 Type-C swap

 drivers/phy/ti/phy-j721e-wiz.c | 66 ++++++++++++++++++++++++++++------
 1 file changed, 56 insertions(+), 10 deletions(-)

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2.36.1