Re: [PATCH v4 3/3] clk: mediatek: add MT7981 clock support

[Daniel Golle]

On Wed, Jan 25, 2023 at 06:23:16PM -0800, Stephen Boyd wrote:
> Quoting Daniel Golle (2023-01-22 07:44:00)
> > +       GATE_SGMII1(CLK_SGM1_CK1_EN, "sgm1_ck1_en", "usb_ln0", 4),
> > +       GATE_SGMII1(CLK_SGM1_CDR_CK1_EN, "sgm1_cdr_ck1_en", "usb_cdr", 5),
> > +};
> > +
> > +static const struct mtk_gate_regs eth_cg_regs = {
> > +       .set_ofs = 0x30,
> > +       .clr_ofs = 0x30,
> > +       .sta_ofs = 0x30,
> > +};
> > +
> > +#define GATE_ETH(_id, _name, _parent, _shift) {        \
> > +               .id = _id,                              \
> > +               .name = _name,                          \
> > +               .parent_name = _parent,                 \
> > +               .regs = &eth_cg_regs,                   \
> > +               .shift = _shift,                        \
> > +               .ops = &mtk_clk_gate_ops_no_setclr_inv, \
> > +       }
> > +
> > +static const struct mtk_gate eth_clks[] __initconst = {
> > +       GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "netsys_2x", 6),
> > +       GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "sgm_325m", 7),
> > +       GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "sgm_325m", 8),
> > +       GATE_ETH(CLK_ETH_WOCPU0_EN, "eth_wocpu0_en", "netsys_wed_mcu", 15),
> > +};
> > +
> > +static const struct mtk_clk_desc eth_desc = {
> > +       .clks = eth_clks,
> > +       .num_clks = ARRAY_SIZE(eth_clks),
> > +};
> > +
> > +static const struct mtk_clk_desc sgmii0_desc = {
> > +       .clks = sgmii0_clks,
> > +       .num_clks = ARRAY_SIZE(sgmii0_clks),
> > +};
> > +
> > +static const struct mtk_clk_desc sgmii1_desc = {
> > +       .clks = sgmii1_clks,
> > +       .num_clks = ARRAY_SIZE(sgmii1_clks),
> > +};
> > +
> > +static const struct of_device_id of_match_clk_mt7981_eth[] = {
> > +       { .compatible = "mediatek,mt7981-ethsys", .data = &eth_desc },
> > +       { .compatible = "mediatek,mt7981-sgmiisys_0", .data = &sgmii0_desc },
> > +       { .compatible = "mediatek,mt7981-sgmiisys_1", .data = &sgmii1_desc },
> > +       { /* sentinel */ }
> > +};
> 
> Actually not applied
> 
> WARNING: DT compatible string "mediatek,mt7981-ethsys" appears un-documented -- check ./Documentation/devicetree/bindings/
> #291: FILE: drivers/clk/mediatek/clk-mt7981-eth.c:103:
> +       { .compatible = "mediatek,mt7981-ethsys", .data = &eth_desc },
> 
> WARNING: DT compatible string "mediatek,mt7981-sgmiisys_0" appears un-documented -- check ./Documentation/devicetree/bindings/
> #292: FILE: drivers/clk/mediatek/clk-mt7981-eth.c:104:
> +       { .compatible = "mediatek,mt7981-sgmiisys_0", .data = &sgmii0_desc },
> 
> WARNING: DT compatible string "mediatek,mt7981-sgmiisys_1" appears un-documented -- check ./Documentation/devicetree/bindings/
> #293: FILE: drivers/clk/mediatek/clk-mt7981-eth.c:105:
> +       { .compatible = "mediatek,mt7981-sgmiisys_1", .data = &sgmii1_desc },
> 
> WARNING: DT compatible string "mediatek,mt7981-infracfg" appears un-documented -- check ./Documentation/devicetree/bindings/
> #506: FILE: drivers/clk/mediatek/clk-mt7981-infracfg.c:195:
> +       { .compatible = "mediatek,mt7981-infracfg", .data = &infracfg_desc },
> 
> Is there a binding update missing?

Right, I forgot to git add the changes in
Documentation/devicetree/bindings/arm/mediatek/, not very smart. I'll
resend with those included in a moment from now.