[GIT PULL] RISC-V Fixes for 6.2-rc6

[Palmer Dabbelt]

The following changes since commit b9b916aee6715cd7f3318af6dc360c4729417b94:

  riscv: uaccess: fix type of 0 variable on error in get_user() (2023-01-05 12:30:41 -0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.2-rc6

for you to fetch changes up to c1d6105869464635d8a2bcf87a43c05f4c0cfca4:

  riscv: Move call to init_cpu_topology() to later initialization stage (2023-01-25 07:20:00 -0800)

----------------------------------------------------------------
RISC-V Fixes for 6.2-rc6

* A few DT bindings fixes to more closely align the ISA string
  requirements between the bindings and the ISA manual.
* A handful of build error/warning fixes.
* A fix to move init_cpu_topology() later in the boot flow, so it can
  allocate memory.
* The IRC channel is now in the MAINTAINERS file, so it's easier to
  find.

----------------------------------------------------------------
Conor Dooley (3):
      dt-bindings: riscv: fix underscore requirement for multi-letter extensions
      dt-bindings: riscv: fix single letter canonical order
      MAINTAINERS: add an IRC entry for RISC-V

Heiko Stuebner (1):
      RISC-V: fix compile error from deduplicated __ALTERNATIVE_CFG_2

Ley Foon Tan (1):
      riscv: Move call to init_cpu_topology() to later initialization stage

Liao Chang (1):
      riscv/kprobe: Fix instruction simulation of JALR

Masahiro Yamada (1):
      riscv: fix -Wundef warning for CONFIG_RISCV_BOOT_SPINWAIT

Palmer Dabbelt (1):
      Merge patch series "riscv,isa fixups"

 Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +-
 MAINTAINERS                                       | 1 +
 arch/riscv/include/asm/alternative-macros.h       | 2 +-
 arch/riscv/kernel/head.S                          | 2 +-
 arch/riscv/kernel/probes/simulate-insn.c          | 4 ++--
 arch/riscv/kernel/smpboot.c                       | 3 ++-
 6 files changed, 8 insertions(+), 6 deletions(-)