Re: [PATCH v4 3/4] arm64: dts: qcom: sc8280xp: Define uart2

[Konrad Dybcio]

On 7.02.2023 06:28, Steev Klimaszewski wrote:
> From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> Signed-off-by: Steev Klimaszewski <steev@xxxxxxxx>
> Reviewed-by: Brian Masney <bmasney@xxxxxxxxxx>
> 
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Konrad
> 
> Changes since v3:
>  * Fix commit message changelog
> 
> Changes since v2:
>  * No changes since v2
> 
> Changes since v1:
>  * change subject line, move node, and add my s-o-b
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index fa2d0d7d1367..eab54aab3b76 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1207,6 +1207,20 @@ spi2: spi@988000 {
>  				status = "disabled";
>  			};
>  
> +			uart2: serial@988000 {
> +				compatible = "qcom,geni-uart";
> +				reg = <0 0x00988000 0 0x4000>;
> +				clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
> +				clock-names = "se";
> +				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> +				operating-points-v2 = <&qup_opp_table_100mhz>;
> +				power-domains = <&rpmhpd SC8280XP_CX>;
> +				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
> +						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
> +				interconnect-names = "qup-core", "qup-config";
> +				status = "disabled";
> +			};
> +
>  			i2c3: i2c@98c000 {
>  				compatible = "qcom,geni-i2c";
>  				reg = <0 0x0098c000 0 0x4000>;