Re: [PATCH v2] arm64: dts: qcom: sm6115: Add geni debug uart node for qup0

[Krzysztof Kozlowski]

On 09/02/2023 16:11, Krzysztof Kozlowski wrote:
> On 08/02/2023 13:27, Bhupesh Sharma wrote:
>> qup0 on sm6115 / sm4250 has 6 SEs, with SE4 as debug uart.
>> Add the debug uart node in sm6115 dtsi file.
>>
>> Cc: Bjorn Andersson <andersson@xxxxxxxxxx>
>> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
>> ---
>>  Changes since v1:
>>   - v1 can be viewed here: https://lore.kernel.org/linux-arm-msm/20221128171215.1768745-1-bhupesh.sharma@xxxxxxxxxx/
>>   - Addressed Konrad's review comments on v1.
>>   - Rebased againt latest linux-next/master which now has the 'qupv3_id_0' node
>>     already in the dtsi file, so just add the debug uart node in v2.
>>
>>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 10 +++++++++-
>>  1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> index 50cb8a82ecd5..3eccfb8c16ce 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> @@ -963,6 +963,15 @@ spi4: spi@4a90000 {
>>  				status = "disabled";
>>  			};
>>  
>> +			uart4: serial@4a90000 {
>> +				compatible = "qcom,geni-debug-uart";
>> +				reg = <0x04a90000 0x4000>;
>> +				clock-names = "se";
>> +				clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
>> +				interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
>> +				status = "disabled";
>> +			};
>> +
>>  			i2c5: i2c@4a94000 {
>>  				compatible = "qcom,geni-i2c";
>>  				reg = <0x04a94000 0x4000>;
>> @@ -992,7 +1001,6 @@ spi5: spi@4a94000 {
>>  				dma-names = "tx", "rx";
>>  				#address-cells = <1>;
>>  				#size-cells = <0>;
>> -				status = "disabled";
> 
> Why do you enable SPI? The commit msg is not explaining it.

Sent fixup:
https://lore.kernel.org/linux-arm-msm/20230209155831.100066-1-krzysztof.kozlowski@xxxxxxxxxx/T/#u

Best regards,
Krzysztof