Am 07.02.23 um 11:50 schrieb Danilo Krummrich:
On 2/7/23 10:35, Christian König wrote:
However, I still don't see why we would want to merge over buffer boundaries, because ultimately we'll end up splitting such a merged mapping later on anyway once one of the buffers is destroyed.
Well the key point is all approaches have some pros and cons.
If we merge and decide to only do that inside certain boundaries then those boundaries needs to be provided and checked against. This burns quite some CPU cycles
If we just merge what we can we might have extra page table updates which cost time and could result in undesired side effects.
If we don't merge at all we have additional housekeeping for the mappings and maybe hw restrictions.
Also, as explained in one of the previous mails in nouveau we can have separate PTs for sparse mappings with large page sizes and separate PTs for memory backed mappings with smaller page sizes overlaying them. Hence, I need to track a single sparse mapping per buffer spanning the whole buffer (which I do with a region) and the actual memory backed mappings within the same range.
Now, this might or might not be unique for Nvidia hardware. If nouveau would be the only potential user, plus we don't care about potentially merging mappings over buffer boundaries and hence producing foreseeable splits of those merged mappings, we could get rid of regions entirely.
This sounds similar to what AMD hw used to have up until gfx8 (I think), basically sparse resources where defined through a separate mechanism to the address resolution of the page tables. I won't rule out that other hardware has similar approaches.
On the other hand when you have separate page tables for address translation and sparse handling then why not instantiate two separate VM manager instances for them?
Regards,
Christian.
Regards,
Christian.
So you need to be able to handle this case anyway and the approach with the regions won't help you at all preventing that.
Regards,
Christian.