Re: [PATCH 4/4] riscv: dts: allwinner: d1: Add video engine node

[Palmer Dabbelt]

On Thu, 05 Jan 2023 08:21:58 PST (-0800), jernej.skrabec@xxxxxxxxx wrote:
> Dne četrtek, 05. januar 2023 ob 15:38:36 CET je Samuel Holland napisal(a):
> > Hi Paul,
> >
> > On 1/5/23 04:11, Paul Kocialkowski wrote:
> > > On Sat 31 Dec 22, 10:46, Samuel Holland wrote:
> > >> D1 contains a video engine which is supported by the Cedrus driver.
> > > 
> > > Does it work "outside the box" without power domain management?
> > > If not, it might be a bit confusing to add the node at this point.
> >
> > Yes, it does. All of the power domains are enabled by default. However,
> > if the PPU series is merged first, I will respin this to include the
> > power-domains property from the beginning.
>
> I would rather see that merged before and having complete node right away.
>
> I've been away, but I'll merge everything that's ready for sunxi tree until 
> end of the weekend.

Just checking up on this one, as it's still in the RISC-V patchwork but 
I don't see it in linux-next.  No big deal on my end, I just don't want 
to be dropping the ball here.

Acked-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>

In case you were waiting for it (in which case sorry).

> Best regards,
> Jernej
>
> > Regards,
> > Samuel
> >
> > >> Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>
> > >> ---
> > >> 
> > >>  arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++++++++++
> > >>  1 file changed, 11 insertions(+)
> > >> 
> > >> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > >> b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index
> > >> dff363a3c934..4bd374279155 100644
> > >> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > >> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > >> @@ -34,6 +34,17 @@ soc {
> > >> 
> > >>  		#address-cells = <1>;
> > >>  		#size-cells = <1>;
> > >> 
> > >> +		ve: video-codec@1c0e000 {
> > >> +			compatible = "allwinner,sun20i-d1-video-
> engine";
> > >> +			reg = <0x1c0e000 0x2000>;
> > >> +			interrupts = <SOC_PERIPHERAL_IRQ(66) 
> IRQ_TYPE_LEVEL_HIGH>;
> > >> +			clocks = <&ccu CLK_BUS_VE>,
> > >> +				 <&ccu CLK_VE>,
> > >> +				 <&ccu CLK_MBUS_VE>;
> > >> +			clock-names = "ahb", "mod", "ram";
> > >> +			resets = <&ccu RST_BUS_VE>;
> > >> +		};
> > >> +
> > >> 
> > >>  		pio: pinctrl@2000000 {
> > >>  		
> > >>  			compatible = "allwinner,sun20i-d1-pinctrl";
> > >>  			reg = <0x2000000 0x800>;