Re: [RFC v1 net-next 0/7] add support for ocelot external ports

[Colin Foster]

Hi Russell,

On Thu, Feb 16, 2023 at 12:14:38PM +0000, Russell King (Oracle) wrote:
> On Wed, Feb 15, 2023 at 11:53:14PM -0800, Colin Foster wrote:
> > Part 3 will, at a minimum, add support for ports 4-7, which are
> > configured to use QSGMII to an external phy (Return Of The QSGMII). With
> > any luck, and some guidance, support for SGMII, SFPs, etc. will also be
> > part of this series.
> > 
> > 
> > This patch series is absolutely an RFC at this point. While all 8 copper
> > ports on the VSC7512 are currently functional, I recognize there are a
> > couple empty function callbacks in the last patch that likely need to be
> > implemented.
> > 
> ...
> > 
> > Also, with patch 7 ("net: dsa: ocelot_ext: add support for external phys")
> > my basis was the function mscc_ocelot_init_ports(), but there were several
> > changes I had to make for DSA / Phylink. Are my implementations of
> > ocelot_ext_parse_port_node() and ocelot_ext_phylink_create() barking up
> > the right tree?
> 
> DSA already creates phylink instances per DSA port, and provides many
> of the phylink MAC operations to the DSA driver via the .phylink_*
> operations in the dsa_switch_ops structure, and this phylink instance
> should be used for managing the status and configuring the port
> according to phylink's callbacks. The core felix code already makes
> use of this, implementing the mac_link_down() and mac_link_up()
> operations to handle when the link comes up or goes down.
> 
> I don't see why one would need to create a separate phylink instance
> to support external PHYs, SFPs, etc on a DSA switch. The phylink
> instance created by DSA is there for the DSA driver to make use of
> for the port, and should be sufficient for this.

This is essentially the feedback I was looking for. "This looks wrong"
which means I'll take a step back.

> 
> I think if you use the DSA-created phylink instance, then you don't
> need any of patch 6. I'm not yet convinced that you need anything
> from patch 7, but maybe you could explain what patch 7 provides that
> the existing felix phylink implementation doesn't already provide.

I'll have to go through it again to remember exactly what I was up
against - it was a while ago now. All of the logic was based on the
logic in ocelot_port_phylink_create() - which is part of the vsc7514
switchdev implementation (a chip that is essentially identical, except
for an internal MIPS instead of external SPI control)

I believe the main gotcha was that control over the phy itself, by way
of phy_set_mode_ext(). That needed the 'struct device_node *portnp'


.... Keeps looking ....

Ahh, yes. Regmaps and regfields aren't initialized at the time of
dt parsing in felix. And the MDIO bus isn't allocated until after that.
That's the reason for patch 6 parse_port_node() - I need the tree node
to get MDIO access to the phy, which I don't have until I'm done parsing
the tree...

There might be a cleaner way for me to do that. I'm tiptoeing a little
bit to avoid any regressions with the felix_vsc9959 or seville_vsc9953.

> I do get the impression that the use of the PCS instance in patch 7
> is an attempt to work around the use of a private instance,
> redirecting the pcs_config and pcs_link_up methods to the
> corresponding MAC operations as a workaround for having the private
> instance.

I'm not convinced I don't need PCS here, and just have things working
wrong.

The configuration looks like this:


		|------------------------------------------------|
		| CPU                                            |
		|------------------------------------------------|
            |
           SPI
            |
		|------------------------------------------------|
		| VSC7512                                        |
		|------------------------------------------------|
            ||        ||         ||         ||      |
		|-------|  |-------|  |-------|  |-------|  |
		| port4 |  | port5 |  | port6 |  | port7 |  |
		|-------|  |-------|  |-------|  |-------|  |
                      ||                            |
                    QSGMII                         MDIO
                      ||                            |
		|------------------------------------------------|
		| VSC8512                                        |
		|------------------------------------------------|
            ||        ||         ||         ||
		|-------|  |-------|  |-------|  |-------|
		| sw0p4 |  | sw0p5 |  | sw0p6 |  | sw0p7 |
		|-------|  |-------|  |-------|  |-------|


Would phylink_pcs need to get involved in the QSGMII link at all, or
should the phylnk from dsa_port_phylink_create() be all that's needed?


> 
> It looks like you need to hook into the mac_config(), mac_link_up()
> and mac_link_down() methods at the core felix layer, so I would
> suggest looking at the felix_info structure, adding methods there for
> each of these, and arranging for the core felix code to forward these
> calls down to the implementation as required.

Yes, I'll look at how I can clean things up.

I greatly appreciate your feedback!

> 
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