[irqchip: irq/irqchip-next] irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts

[irqchip-bot for Florian Fainelli]

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     94debe03e8afa1267f95a9001786a6aa506b9ff3
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/94debe03e8afa1267f95a9001786a6aa506b9ff3
Author:        Florian Fainelli <f.fainelli@xxxxxxxxx>
AuthorDate:    Fri, 16 Dec 2022 15:09:33 -08:00
Committer:     Marc Zyngier <maz@xxxxxxxxxx>
CommitterDate: Sat, 18 Feb 2023 14:23:41 

irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts

When support for the level triggered interrupt controller flavor was
added with c0ca7262088e, we forgot to update the flags to be set to
contain IRQ_LEVEL. While the flow handler is correct, the output from
/proc/interrupts does not show such interrupts as being level triggered
when they are, correct that.

Fixes: c0ca7262088e ("irqchip/brcmstb-l2: Add support for the BCM7271 L2 controller")
Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20221216230934.2478345-2-f.fainelli@xxxxxxxxx
---
 drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index e4efc08..091b0fe 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -161,6 +161,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
 					  *init_params)
 {
 	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+	unsigned int set = 0;
 	struct brcmstb_l2_intc_data *data;
 	struct irq_chip_type *ct;
 	int ret;
@@ -208,9 +209,12 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
 		flags |= IRQ_GC_BE_IO;
 
+	if (init_params->handler == handle_level_irq)
+		set |= IRQ_LEVEL;
+
 	/* Allocate a single Generic IRQ chip for this node */
 	ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
-			np->full_name, init_params->handler, clr, 0, flags);
+			np->full_name, init_params->handler, clr, set, flags);
 	if (ret) {
 		pr_err("failed to allocate generic irq chip\n");
 		goto out_free_domain;