[PATCH -next] arm64: Optimize the comparison of unsigned expressions to avoid compiling error
From: Lin Yujun
Date: Mon Feb 20 2023 - 20:30:13 EST
while compile arch/arm64/include/asm/cpufeature.h with
-Werror=type-limits enabled, errors shown as below:
./arch/arm64/include/asm/cpufeature.h: In function 'system_supports_4kb_granule':
./arch/arm64/include/asm/cpufeature.h:653:14: error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits]
return (val >= ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN) &&
^~
./arch/arm64/include/asm/cpufeature.h: In function 'system_supports_64kb_granule':
./arch/arm64/include/asm/cpufeature.h:666:14: error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits]
return (val >= ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN) &&
^~
Modify the return judgment statement, use
"((val - min) < (val - max - 1))" to confirm that returns
true in “min <= val <= max” cases, false in other cases.
Fixes: 79d82cbcbb3d ("arm64/kexec: Test page size support with new TGRAN range values")
Signed-off-by: Lin Yujun <linyujun809@xxxxxxxxxx>
---
arch/arm64/include/asm/cpufeature.h | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 03d1c9d7af82..0a6bda025141 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -54,6 +54,9 @@ enum ftr_type {
#define FTR_VISIBLE_IF_IS_ENABLED(config) \
(IS_ENABLED(config) ? FTR_VISIBLE : FTR_HIDDEN)
+#define IN_RANGE_INCLUSIVE(val, min, max) \
+ (((val) - (min)) < ((val) - (max) - 1))
+
struct arm64_ftr_bits {
bool sign; /* Value is signed ? */
bool visible;
@@ -693,8 +696,9 @@ static inline bool system_supports_4kb_granule(void)
val = cpuid_feature_extract_unsigned_field(mmfr0,
ID_AA64MMFR0_EL1_TGRAN4_SHIFT);
- return (val >= ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN) &&
- (val <= ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX);
+ return IN_RANGE_INCLUSIVE(val,
+ ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN,
+ ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX);
}
static inline bool system_supports_64kb_granule(void)
@@ -706,8 +710,9 @@ static inline bool system_supports_64kb_granule(void)
val = cpuid_feature_extract_unsigned_field(mmfr0,
ID_AA64MMFR0_EL1_TGRAN64_SHIFT);
- return (val >= ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN) &&
- (val <= ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX);
+ return IN_RANGE_INCLUSIVE(val,
+ ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN,
+ ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX);
}
static inline bool system_supports_16kb_granule(void)
@@ -719,8 +724,9 @@ static inline bool system_supports_16kb_granule(void)
val = cpuid_feature_extract_unsigned_field(mmfr0,
ID_AA64MMFR0_EL1_TGRAN16_SHIFT);
- return (val >= ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN) &&
- (val <= ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX);
+ return IN_RANGE_INCLUSIVE(val,
+ ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN,
+ ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX);
}
static inline bool system_supports_mixed_endian_el0(void)
--
2.34.1