Re: [PATCH v2 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator

[Krzysztof Kozlowski]

On 21/02/2023 09:33, Xingyu Wu wrote:
> Add bindings for the System-Top-Group clock and reset generator (STGCRG)
> on the JH7110 RISC-V SoC by StarFive Ltd.
> 
> Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx>


> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 93eb504c3b21..2e70c9f21989 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19914,6 +19914,7 @@ F:	arch/riscv/boot/dts/starfive/
>  STARFIVE JH71X0 CLOCK DRIVERS
>  M:	Emil Renner Berthing <kernel@xxxxxxxx>
>  M:	Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
> +M:	Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx>

No improvements here. You add here new bindings for one device and then
- without explanation - add yourself to all Starfive clock bindings.
Either explain it or drop it or move it to separate patch.

You already got comment for this.

Best regards,
Krzysztof