Re: [PATCH 5/5] drm/msm/a5xx: Enable optional icc voting from OPP tables

[Dmitry Baryshkov]

On 23/02/2023 00:14, Konrad Dybcio wrote:
> On 22.02.2023 23:12, Dmitry Baryshkov wrote:
> > On 22/02/2023 23:47, Konrad Dybcio wrote:
> > > Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework
> > > handle bus voting as part of power level setting.
> >
> > This can probably go to the generic code path rather than sticking it into a5xx only.
> The reasoning is explained in the cover letter, a3xx/a4xx already
> have "raw" icc set calls which would require more work (and above
> all, testing) to untangle while keeping backwards compat, this is
> a midterm solution that would allow getting scaling to work earlier.

Those two platforms call icc_set_bw() during setup, however their opp 
tables do not contain BW settings, making dev_pm_opp_of_find_icc_paths() 
nop. So, I think, we might as well call this function on a3xx/a4xx, 
making the code future proof.

> Konrad
> > > Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> > > ---
> > >    drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++++
> > >    1 file changed, 4 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> > > index d09221f97f71..a33af0cc27b6 100644
> > > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> > > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> > > @@ -1775,5 +1775,9 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
> > >        /* Set up the preemption specific bits and pieces for each ringbuffer */
> > >        a5xx_preempt_init(gpu);
> > >    +    ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
> > > +    if (ret)
> > > +        return ERR_PTR(ret);
> > > +
> > >        return gpu;
> > >    }

--
With best wishes
Dmitry