Re: [PATCH v1 02/11] media: dt-bindings: starfive,jh7110-mipi-csi2: add binding docmuent

From: Krzysztof Kozlowski
Date: Fri Mar 03 2023 - 03:42:30 EST


On 02/03/2023 10:19, jack.zhu wrote:
> Add DT binding document for Starfive MIPI CSI2 receiver

Subject: drop second/last, redundant "add binding document". The
"dt-bindings" prefix is already stating that these are bindings and it
is a document. Write something useful instead.

>
> Signed-off-by: jack.zhu <jack.zhu@xxxxxxxxxxxxxxxx>
> ---
> .../media/starfive,jh7110-mipi-csi2.yaml | 177 ++++++++++++++++++
> 1 file changed, 177 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/starfive,jh7110-mipi-csi2.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/starfive,jh7110-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/starfive,jh7110-mipi-csi2.yaml
> new file mode 100644
> index 000000000000..6569fac9e856
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/starfive,jh7110-mipi-csi2.yaml
> @@ -0,0 +1,177 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

Why for patch 1 and 2 you are using difference SPDX?

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/starfive,jh7110-mipi-csi2.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Starfive JH7110 MIPI CSI-2 receiver
> +
> +maintainers:
> + - Jack Zhu <jack.zhu@xxxxxxxxxxxxxxxx>
> + - Changhuang Liang <changhuang.liang@xxxxxxxxxxxxxxxx>
> +
> +description: |-

Drop |-

> + The JH7110 MIPI CSI-2 receiver device is responsible for handling CSI2
> + protocol based camera sensor data stream.
> +
> +properties:
> + compatible:
> + enum:
> + - starfive,jh7110-csi2rx
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: CSI2Rx system clock
> + - description: Gated Register bank clock for APB interface
> + - description: pixel Clock for Stream interface 0
> + - description: pixel Clock for Stream interface 1
> + - description: pixel Clock for Stream interface 2
> + - description: pixel Clock for Stream interface 3
> +
> + clock-names:
> + items:
> + - const: sys_clk
> + - const: p_clk
> + - const: pixel_if0_clk
> + - const: pixel_if1_clk
> + - const: pixel_if2_clk
> + - const: pixel_if3_clk

Drop _clk suffixes

> +
> + resets:
> + items:
> + - description: CSI2Rx system reset
> + - description: Gated Register bank reset for APB interface
> + - description: pixel reset for Stream interface 0
> + - description: pixel reset for Stream interface 1
> + - description: pixel reset for Stream interface 2
> + - description: pixel reset for Stream interface 3
> +
> + reset-names:
> + items:
> + - const: sys_rst

Drop _rst suffixes

> + - const: p_rst
> + - const: pixel_if0_rst
> + - const: pixel_if1_rst
> + - const: pixel_if2_rst
> + - const: pixel_if3_rst
> +
> + phys:
> + maxItems: 1
> + description: MIPI D-PHY
> +
> + phy-names:
> + items:
> + - const: dphy
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port node, single endpoint describing the CSI-2 transmitter.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + bus-type:
> + items:

This is not an array.

> + - const: 4
> +
> + clock-lanes:
> + maxItems: 1

Not an array...

> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> + items:
> + maximum: 4
> +
> + required:
> + - bus-type

Since this is fixed 4, do you actually require it? Why?

> + - clock-lanes
> + - data-lanes
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + Output port node
> +
> + required:
> + - port@0
> + - port@1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> + - phys
> + - phy-names
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +

Drop blank line

> + csi2rx: csi-bridge@19800000 {

Maybe just "csi@"?
> + compatible = "starfive,jh7110-csi2rx";
> + reg = <0x19800000 0x10000>;
> + clocks = <&ispcrg 7>,
> + <&ispcrg 6>,

Indentation looks odd... did you align it?

> + <&ispcrg 8>,
> + <&ispcrg 9>,
> + <&ispcrg 10>,
> + <&ispcrg 11>;
> + clock-names = "sys_clk", "p_clk",
> + "pixel_if0_clk", "pixel_if1_clk",
> + "pixel_if2_clk", "pixel_if3_clk";
> + resets = <&ispcrg 9>,
> + <&ispcrg 4>,
> + <&ispcrg 5>,
> + <&ispcrg 6>,
> + <&ispcrg 7>,
> + <&ispcrg 8>;
> + reset-names = "sys_rst", "p_rst",
> + "pixel_if0_rst", "pixel_if1_rst",
> + "pixel_if2_rst", "pixel_if3_rst";
> + phys = <&csi_phy>;
> + phy-names = "dphy";


Best regards,
Krzysztof