Re: [PATCH 2/5] mtd: rawnand: qcom: Add initial support for qspi nand
From: Md Sadre Alam
Date: Mon Mar 06 2023 - 09:20:35 EST
On 10/29/2020 2:37 PM, Boris Brezillon wrote:
Hello,
On Sat, 10 Oct 2020 11:01:39 +0530
Md Sadre Alam <mdalam@xxxxxxxxxxxxxx> wrote:
This change will add initial support for qspi (serial nand).
QPIC Version v.2.0 onwards supports serial nand as well so this
change will initialize all required register to enable qspi (serial
nand).
This change is supporting very basic functionality of qspi nand flash.
1. Reset device (Reset QSPI NAND device).
2. Device detection (Read id QSPI NAND device).
Unfortunately, that's not going to work in the long term. You're
basically hacking the raw NAND framework to make SPI NANDs fit. I do
understand the rationale behind this decision (re-using the code for
ECC and probably other things), but that's not going to work. So I'd
recommend doing the following instead:
1/ implement a SPI-mem controller driver
2/ implement an ECC engine driver so the ECC logic can be shared
between the SPI controller and raw NAND controller drivers
3/ convert the raw NAND driver to the exec_op() interface (none of
this hack would have been possible if the driver was using the new
API)
Regards,
Boris
Sorry for late reply, again started working on this feature
support. The QPIC v2 on wards there is serial nand support got added ,
its not a standard SPI controller
its QPIC controller having support for serial nand. All SPI related
configuration done by QPIC hardware and its not exposed as SPI bus to
the external world. Only based on
QPIC_SPI_CFG = 1, serial functionality will get selected. So that no
need to implement as SPI-mem controller driver, since its not a SPI
controller.
Please check the below diagram for top view of QPIC controller.
QPIC Wrapper
___________________________________________________________________________________________
AHB Master IF |
____________________________________ |____________________________| |
<----------------------------------------- | |
| | QPIC IO_MACRO
| |
| |
QPIC | |
(control the SPI BUS | |
--------------------------------------------------> Serial NAND IOs
| |
QPIC_SPI_CFG = 1 ---------------> | |
internally) | |
-------------------------------------------------->
| |
| | | |
| | |
|_____________________________| |
| |
| | |
| |
| | _____________________________| |
| |
| | | |
| |
| | Ebi2_ext_if | |
| | | | | |
| |
QPIC_SPI_CFG = 0 ----------------------> | |
| |-------------------------------------------------> Parallel
NAND IOs
| |
| | |
|--------------------------------------------------->
<------------------------------------------
|_____________|_____________________________________|_______|______________________________|____|
AHB Slave IF
Regards,
Alam.