Re: [PATCH v7 2/5] arm64: dts: qcom: Add msm8939 SoC

[Bryan O'Donoghue]

On 06/03/2023 15:04, Stephan Gerhold wrote:
> Hi Bryan,
>
> Thanks for making the changes. I only have some minor nitpicks now:

> > +
> > +			tsens_base1: base1@a0 {
> > +				reg = <0xa0 0x1>;
> > +				bits = <0 8>;
> > +			};
> > +
> > +			tsens_s5_p1: s5-p1@a1 {
> > +				reg = <0xa1 0x1>;
> > +				bits = <0 6>;
> > +			};
> > [...]
> > +		tsens: thermal-sensor@4a9000 {
> > +			compatible = "qcom,msm8939-tsens", "qcom,tsens-v0_1";
> > +			reg = <0x004a9000 0x1000>, /* TM */
> > +			      <0x004a8000 0x1000>; /* SROT */
> > +			nvmem-cells = <&tsens_mode>,
> > +				      <&tsens_base1>, <&tsens_base2>,
> > +				      <&tsens_s0_p1>, <&tsens_s0_p2>,
> > +				      <&tsens_s1_p1>, <&tsens_s1_p2>,
> > +				      <&tsens_s2_p1>, <&tsens_s2_p2>,
> > +				      <&tsens_s3_p1>, <&tsens_s3_p2>,
> > +				      <&tsens_s4_p1>, <&tsens_s4_p2>,
> > +				      <&tsens_s4_p1>, <&tsens_s4_p2>,
> > +				      <&tsens_s5_p1>, <&tsens_s5_p2>,
> > +				      <&tsens_s6_p1>, <&tsens_s6_p2>,
> > +				      <&tsens_s7_p1>, <&tsens_s7_p2>,
> > +				      <&tsens_s8_p1>, <&tsens_s8_p2>;
> > +			nvmem-cell-names = "mode",
> > +					   "base1", "base2",
> > +					   "s0_p1", "s0_p2",
> > +					   "s1_p1", "s1_p2",
> > +					   "s2_p1", "s2_p2",
> > +					   "s3_p1", "s3_p2",
> > +					   "s4_p1", "s4_p2",
> > +					   "s4_p1", "s4_p2",
>
> s4_p1/p2 are specified twice, is this on purpose or accidental?

On purpose I believe.

@Dmitry ?

> > +					   "s5_p1", "s5_p2",
> > +					   "s6_p1", "s6_p2",
> > +					   "s7_p1", "s7_p2",
> > +					   "s8_p1", "s8_p2";
> > +			#qcom,sensors = <9>;
> > +			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> > +			interrupt-names = "uplow";
> > +			#thermal-sensor-cells = <1>;
> > +		};
> > [...]
> > +		usb: usb@78d9000 {
> > +			compatible = "qcom,ci-hdrc";
> > +			reg = <0x078d9000 0x200>,
> > +			      <0x078d9200 0x200>;
> > +			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&gcc GCC_USB_HS_AHB_CLK>,
> > +				 <&gcc GCC_USB_HS_SYSTEM_CLK>;
> > +			clock-names = "iface", "core";
> > +			assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
> > +			assigned-clock-rates = <80000000>;
> > +			resets = <&gcc GCC_USB_HS_BCR>;
> > +			reset-names = "core";
> > +			#reset-cells = <1>;
> > +			phy_type = "ulpi";
> > +			dr_mode = "otg";
>
> Please add
>
> 			hnp-disable;
> 			srp-disable;
> 			adp-disable;
>
> here for consistency with msm8916.dtsi. These are needed for correct
> behavior if you enable CONFIG_USB_OTG_FSM, see commit bfd5d21abcd5c
> ("arm64: dts: qcom: msm8916: Move common USB properties to msm8916.dtsi")
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bfd5d21abcd5c7941ad79b594f5f42e27496eb28

Hmm, I haven't noticed any problems with OTG - then again, I'm looking 
at my kernel config and +# CONFIG_USB_OTG_FSM is not set