Re: [PATCH 3/3] dts: usb: add StarFive JH7110 USB dts configuration.

[Minda Chen]

On 2023/3/7 2:32, Emil Renner Berthing wrote:
> On Mon, 6 Mar 2023 at 10:55, Minda Chen <minda.chen@xxxxxxxxxxxxxxxx> wrote:
>>
>> USB phy dts configuration. Also includes Cadence USB
>> subnode configuration.
>>
>> Signed-off-by: Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>
>> ---
>>  .../jh7110-starfive-visionfive-2.dtsi         |  6 +++
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi      | 39 +++++++++++++++++++
>>  2 files changed, 45 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index e8b8f4346fdd..2a9ed8b9ee25 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -244,3 +244,9 @@
>>                 };
>>         };
>>  };
>> +
>> +&usb0 {
>> +       starfive,usb2-only;
>> +       dr_mode = "peripheral";
>> +       status = "okay";
>> +};
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index be180f23963e..ee665cdc3510 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -628,5 +628,44 @@
>>                         starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
>>                         status = "disabled";
>>                 };
>> +
>> +               usb0: usbphy@10200000 {
> 
> Please keep the nodes sorted by the address after @
>ok. Thanks.
>> +                       compatible = "starfive,jh7110-usb";
>> +                       reg = <0x0 0x10210000 0x0 0x1000>,
>> +                             <0x0 0x10200000 0x0 0x1000>;
>> +                       reg-names = "usb3", "usb2";
>> +                       clocks = <&syscrg JH7110_SYSCLK_USB_125M>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_APP_125>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_LPM>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_STB>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_APB>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_AXI>,
>> +                                <&stgcrg JH7110_STGCLK_USB0_UTMI_APB>;
>> +                       clock-names = "usb_125m", "usb0_app_125", "usb0_lpm",
>> +                               "usb0_stb", "usb0_apb", "usb0_axi", "usb0_utmi_apb";
>> +                       resets = <&stgcrg JH7110_STGRST_USB0_PWRUP>,
>> +                                <&stgcrg JH7110_STGRST_USB0_APB>,
>> +                                <&stgcrg JH7110_STGRST_USB0_AXI>,
>> +                                <&stgcrg JH7110_STGRST_USB0_UTMI_APB>;
>> +                       starfive,stg-syscon = <&stg_syscon 0x4 0xc4 0x148 0x1f4>;
>> +                       starfive,sys-syscon = <&sys_syscon 0x18>;
>> +                       status = "disabled";
>> +                       #address-cells = <2>;
>> +                       #size-cells = <2>;
>> +                       #interrupt-cells = <1>;
>> +                       #phy-cells = <0>;
>> +                       ranges;
> 
> Please add an empty line here.
> ok.
>> +                       usbdrd_cdns3: usb@10100000 {
>> +                               compatible = "cdns,usb3";
>> +                               reg = <0x0 0x10100000 0x0 0x10000>,
>> +                                     <0x0 0x10110000 0x0 0x10000>,
>> +                                     <0x0 0x10120000 0x0 0x10000>;
>> +                               reg-names = "otg", "xhci", "dev";
>> +                               interrupts = <100>, <108>, <110>;
>> +                               interrupt-names = "host", "peripheral", "otg";
>> +                               phy-names = "cdns3,usb3-phy", "cnds3,usb2-phy";
>> +                               maximum-speed = "super-speed";
>> +                       };
>> +               };
>>         };
>>  };
>> --
>> 2.17.1
>>
>>
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