Re: [PATCH] x86/resctrl: avoid compiler optimization in __resctrl_sched_in

[Linus Torvalds]

On Tue, Mar 7, 2023 at 3:36 AM Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
>
> > I don't have a satisfactory answer yet, but am looking into this.
>
> Oh, geez, what a twisty tale that... So Linus knew back in '09 that "p"
> was icky, but it sorta was the only thing and it 'worked' -- until now
> :/

Yeah, so 'p' definitely is about the pointer, and I do worry that it
is only a dependency on exactly that - not the memory behind it.

I have this dim memory about us having talked about this with some gcc
person, and coming to the conclusion that it was all fine, but I
suspect it was in some very specific case where it might have been
fine for other reasons.

> Is there a way to explicitly order these things? barrier() obviously
> isn't going to help here.

So one "asm volatile" should always be ordered wrt another "asm volatile".

I have this other dim memory of it not even being clear whether "asm"
and "asm volatile" are ordered. I don't think they necessarily are
(with the obvious caveat that an asm without any arguments - a
so-called "basic asm" - is always volatile whether the "volatile" is
there or not).

I have a lot of dim memories, in other words. Should that worry me?

And then there's the "memory" clobber, of course.

But both of those are also going to disable CSE.

I do think that percpu_stable_op can use "p", but only when the value
is *truly* stable and there is no question about it being moved around
things that might modify it.

                         Linus